[PATCH] D129372: [DebugInfo][NFC?] Add new MachineOperand type and change DBG_INSTR_REF syntax

[Stephen Tozer via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe10e93631541: [DebugInfo][NFC] Add new MachineOperand type and change DBG_INSTR_REF syntax (authored by StephenTozer).

Changed prior to commit:
  https://reviews.llvm.org/D129372?vs=486863&id=486918#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129372/new/

https://reviews.llvm.org/D129372

Files:
  llvm/docs/MIRLangRef.rst
  llvm/include/llvm/CodeGen/MachineInstr.h
  llvm/include/llvm/CodeGen/MachineInstrBuilder.h
  llvm/include/llvm/CodeGen/MachineOperand.h
  llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
  llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
  llvm/lib/CodeGen/LiveDebugVariables.cpp
  llvm/lib/CodeGen/MIRParser/MILexer.cpp
  llvm/lib/CodeGen/MIRParser/MILexer.h
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/lib/CodeGen/MIRPrinter.cpp
  llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
  llvm/lib/CodeGen/MachineFunction.cpp
  llvm/lib/CodeGen/MachineInstr.cpp
  llvm/lib/CodeGen/MachineOperand.cpp
  llvm/lib/CodeGen/MachineSink.cpp
  llvm/lib/CodeGen/MachineStableHash.cpp
  llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
  llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
  llvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir
  llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
  llvm/test/DebugInfo/AArch64/instr-ref-const-physreg.ll
  llvm/test/DebugInfo/ARM/instr-ref-tcreturn.ll
  llvm/test/DebugInfo/MIR/InstrRef/accept-nonlive-reg-phis.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv2.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
  llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size.mir
  llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-load-folding.mir
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir
  llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced2.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir
  llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir
  llvm/test/DebugInfo/MIR/InstrRef/spill-slot-limits.mir
  llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
  llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
  llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
  llvm/test/DebugInfo/MIR/InstrRef/twoaddr-to-threeaddr-sub.mir
  llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
  llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
  llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
  llvm/test/DebugInfo/X86/dbg-value-arg-movement.ll
  llvm/test/DebugInfo/X86/dbg-value-funcarg.ll
  llvm/test/DebugInfo/X86/dbg-value-funcarg2.ll
  llvm/test/DebugInfo/X86/dbg-value-funcarg4.ll
  llvm/test/DebugInfo/X86/instr-ref-dbg-declare.ll
  llvm/test/DebugInfo/X86/instr-ref-dyn-alloca-win32.ll
  llvm/test/DebugInfo/X86/instr-ref-ir-reg-read.ll
  llvm/test/DebugInfo/X86/instr-ref-sdag-empty-vreg.ll
  llvm/test/DebugInfo/X86/instr-ref-selectiondag.ll
  llvm/test/DebugInfo/X86/pr34545.ll
  llvm/test/DebugInfo/X86/pr40427.ll
  llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
  llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
  llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
  llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
  llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
  llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll
  llvm/test/DebugInfo/X86/sdag-ir-salvage.ll
  llvm/test/DebugInfo/X86/sdag-salvage-add.ll
  llvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll
  llvm/test/DebugInfo/assignment-tracking/X86/loop-sink.ll
  llvm/test/DebugInfo/assignment-tracking/X86/lower-to-value.ll
  llvm/test/DebugInfo/assignment-tracking/X86/sdag-dangling-dbgassign.ll
  llvm/test/DebugInfo/assignment-tracking/X86/sdag-ir-salvage-assign.ll
  llvm/test/DebugInfo/assignment-tracking/X86/sdag-transfer-dbgassign.ll

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