[llvm] d18a2dc - [GVN] Name instructions in test (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 6 08:28:32 PST 2023
Author: Nikita Popov
Date: 2023-01-06T17:28:18+01:00
New Revision: d18a2dc5c9757aa32a202c1f98a8dea21ac8ca80
URL: https://github.com/llvm/llvm-project/commit/d18a2dc5c9757aa32a202c1f98a8dea21ac8ca80
DIFF: https://github.com/llvm/llvm-project/commit/d18a2dc5c9757aa32a202c1f98a8dea21ac8ca80.diff
LOG: [GVN] Name instructions in test (NFC)
Added:
Modified:
llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll b/llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll
index 167c775af4d74..dffc56dba577c 100644
--- a/llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll
+++ b/llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll
@@ -5,107 +5,113 @@ declare noalias i8* @_Znam(i64) #1
define i32 @TestNoAsan() {
; CHECK-LABEL: @TestNoAsan(
+; CHECK-NEXT: bb:
; CHECK-NEXT: ret i32 0
;
- %1 = tail call noalias i8* @_Znam(i64 2)
- %2 = getelementptr inbounds i8, i8* %1, i64 1
- store i8 0, i8* %2, align 1
- store i8 0, i8* %1, align 1
- %3 = bitcast i8* %1 to i16*
- %4 = load i16, i16* %3, align 4
- %5 = icmp eq i16 %4, 0
- br i1 %5, label %11, label %6
+bb:
+ %i = tail call noalias i8* @_Znam(i64 2)
+ %i1 = getelementptr inbounds i8, i8* %i, i64 1
+ store i8 0, i8* %i1, align 1
+ store i8 0, i8* %i, align 1
+ %i2 = bitcast i8* %i to i16*
+ %i3 = load i16, i16* %i2, align 4
+ %i4 = icmp eq i16 %i3, 0
+ br i1 %i4, label %bb10, label %bb5
-; <label>:6 ; preds = %0
- %7 = getelementptr inbounds i8, i8* %1, i64 2
- %8 = bitcast i8* %7 to i16*
- %9 = load i16, i16* %8, align 2
- %10 = sext i16 %9 to i32
- br label %11
+bb5: ; preds = %bb
+ %i6 = getelementptr inbounds i8, i8* %i, i64 2
+ %i7 = bitcast i8* %i6 to i16*
+ %i8 = load i16, i16* %i7, align 2
+ %i9 = sext i16 %i8 to i32
+ br label %bb10
-; <label>:11 ; preds = %0, %6
- %12 = phi i32 [ %10, %6 ], [ 0, %0 ]
- ret i32 %12
+bb10: ; preds = %bb5, %bb
+ %i11 = phi i32 [ %i9, %bb5 ], [ 0, %bb ]
+ ret i32 %i11
}
define i32 @TestAsan() sanitize_address {
; CHECK-LABEL: @TestAsan(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias dereferenceable_or_null(2) i8* @_Znam(i64 2)
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 1
-; CHECK-NEXT: store i8 0, i8* [[TMP2]], align 1
-; CHECK-NEXT: store i8 0, i8* [[TMP1]], align 1
-; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i16*
-; CHECK-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4
-; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i16 [[TMP4]], 0
-; CHECK-NEXT: br i1 [[TMP5]], label [[TMP11:%.*]], label [[TMP6:%.*]]
-; CHECK: 6:
-; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 2
-; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16*
-; CHECK-NEXT: [[TMP9:%.*]] = load i16, i16* [[TMP8]], align 2
-; CHECK-NEXT: [[TMP10:%.*]] = sext i16 [[TMP9]] to i32
-; CHECK-NEXT: br label [[TMP11]]
-; CHECK: 11:
-; CHECK-NEXT: [[TMP12:%.*]] = phi i32 [ [[TMP10]], [[TMP6]] ], [ 0, [[TMP0:%.*]] ]
-; CHECK-NEXT: ret i32 [[TMP12]]
+; CHECK-NEXT: bb:
+; CHECK-NEXT: [[I:%.*]] = tail call noalias dereferenceable_or_null(2) i8* @_Znam(i64 2)
+; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds i8, i8* [[I]], i64 1
+; CHECK-NEXT: store i8 0, i8* [[I1]], align 1
+; CHECK-NEXT: store i8 0, i8* [[I]], align 1
+; CHECK-NEXT: [[I2:%.*]] = bitcast i8* [[I]] to i16*
+; CHECK-NEXT: [[I3:%.*]] = load i16, i16* [[I2]], align 4
+; CHECK-NEXT: [[I4:%.*]] = icmp eq i16 [[I3]], 0
+; CHECK-NEXT: br i1 [[I4]], label [[BB10:%.*]], label [[BB5:%.*]]
+; CHECK: bb5:
+; CHECK-NEXT: [[I6:%.*]] = getelementptr inbounds i8, i8* [[I]], i64 2
+; CHECK-NEXT: [[I7:%.*]] = bitcast i8* [[I6]] to i16*
+; CHECK-NEXT: [[I8:%.*]] = load i16, i16* [[I7]], align 2
+; CHECK-NEXT: [[I9:%.*]] = sext i16 [[I8]] to i32
+; CHECK-NEXT: br label [[BB10]]
+; CHECK: bb10:
+; CHECK-NEXT: [[I11:%.*]] = phi i32 [ [[I9]], [[BB5]] ], [ 0, [[BB:%.*]] ]
+; CHECK-NEXT: ret i32 [[I11]]
;
- %1 = tail call noalias i8* @_Znam(i64 2)
- %2 = getelementptr inbounds i8, i8* %1, i64 1
- store i8 0, i8* %2, align 1
- store i8 0, i8* %1, align 1
- %3 = bitcast i8* %1 to i16*
- %4 = load i16, i16* %3, align 4
- %5 = icmp eq i16 %4, 0
- br i1 %5, label %11, label %6
+bb:
+ %i = tail call noalias i8* @_Znam(i64 2)
+ %i1 = getelementptr inbounds i8, i8* %i, i64 1
+ store i8 0, i8* %i1, align 1
+ store i8 0, i8* %i, align 1
+ %i2 = bitcast i8* %i to i16*
+ %i3 = load i16, i16* %i2, align 4
+ %i4 = icmp eq i16 %i3, 0
+ br i1 %i4, label %bb10, label %bb5
-; <label>:6 ; preds = %0
- %7 = getelementptr inbounds i8, i8* %1, i64 2
- %8 = bitcast i8* %7 to i16*
- %9 = load i16, i16* %8, align 2
- %10 = sext i16 %9 to i32
- br label %11
+bb5: ; preds = %bb
+ %i6 = getelementptr inbounds i8, i8* %i, i64 2
+ %i7 = bitcast i8* %i6 to i16*
+ %i8 = load i16, i16* %i7, align 2
+ %i9 = sext i16 %i8 to i32
+ br label %bb10
-; <label>:11 ; preds = %0, %6
- %12 = phi i32 [ %10, %6 ], [ 0, %0 ]
- ret i32 %12
+bb10: ; preds = %bb5, %bb
+ %i11 = phi i32 [ %i9, %bb5 ], [ 0, %bb ]
+ ret i32 %i11
}
define i32 @TestHWAsan() sanitize_hwaddress {
; CHECK-LABEL: @TestHWAsan(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias dereferenceable_or_null(2) i8* @_Znam(i64 2)
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 1
-; CHECK-NEXT: store i8 0, i8* [[TMP2]], align 1
-; CHECK-NEXT: store i8 0, i8* [[TMP1]], align 1
-; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i16*
-; CHECK-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4
-; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i16 [[TMP4]], 0
-; CHECK-NEXT: br i1 [[TMP5]], label [[TMP11:%.*]], label [[TMP6:%.*]]
-; CHECK: 6:
-; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 2
-; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16*
-; CHECK-NEXT: [[TMP9:%.*]] = load i16, i16* [[TMP8]], align 2
-; CHECK-NEXT: [[TMP10:%.*]] = sext i16 [[TMP9]] to i32
-; CHECK-NEXT: br label [[TMP11]]
-; CHECK: 11:
-; CHECK-NEXT: [[TMP12:%.*]] = phi i32 [ [[TMP10]], [[TMP6]] ], [ 0, [[TMP0:%.*]] ]
-; CHECK-NEXT: ret i32 [[TMP12]]
+; CHECK-NEXT: bb:
+; CHECK-NEXT: [[I:%.*]] = tail call noalias dereferenceable_or_null(2) i8* @_Znam(i64 2)
+; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds i8, i8* [[I]], i64 1
+; CHECK-NEXT: store i8 0, i8* [[I1]], align 1
+; CHECK-NEXT: store i8 0, i8* [[I]], align 1
+; CHECK-NEXT: [[I2:%.*]] = bitcast i8* [[I]] to i16*
+; CHECK-NEXT: [[I3:%.*]] = load i16, i16* [[I2]], align 4
+; CHECK-NEXT: [[I4:%.*]] = icmp eq i16 [[I3]], 0
+; CHECK-NEXT: br i1 [[I4]], label [[BB10:%.*]], label [[BB5:%.*]]
+; CHECK: bb5:
+; CHECK-NEXT: [[I6:%.*]] = getelementptr inbounds i8, i8* [[I]], i64 2
+; CHECK-NEXT: [[I7:%.*]] = bitcast i8* [[I6]] to i16*
+; CHECK-NEXT: [[I8:%.*]] = load i16, i16* [[I7]], align 2
+; CHECK-NEXT: [[I9:%.*]] = sext i16 [[I8]] to i32
+; CHECK-NEXT: br label [[BB10]]
+; CHECK: bb10:
+; CHECK-NEXT: [[I11:%.*]] = phi i32 [ [[I9]], [[BB5]] ], [ 0, [[BB:%.*]] ]
+; CHECK-NEXT: ret i32 [[I11]]
;
- %1 = tail call noalias i8* @_Znam(i64 2)
- %2 = getelementptr inbounds i8, i8* %1, i64 1
- store i8 0, i8* %2, align 1
- store i8 0, i8* %1, align 1
- %3 = bitcast i8* %1 to i16*
- %4 = load i16, i16* %3, align 4
- %5 = icmp eq i16 %4, 0
- br i1 %5, label %11, label %6
+bb:
+ %i = tail call noalias i8* @_Znam(i64 2)
+ %i1 = getelementptr inbounds i8, i8* %i, i64 1
+ store i8 0, i8* %i1, align 1
+ store i8 0, i8* %i, align 1
+ %i2 = bitcast i8* %i to i16*
+ %i3 = load i16, i16* %i2, align 4
+ %i4 = icmp eq i16 %i3, 0
+ br i1 %i4, label %bb10, label %bb5
-; <label>:6 ; preds = %0
- %7 = getelementptr inbounds i8, i8* %1, i64 2
- %8 = bitcast i8* %7 to i16*
- %9 = load i16, i16* %8, align 2
- %10 = sext i16 %9 to i32
- br label %11
+bb5: ; preds = %bb
+ %i6 = getelementptr inbounds i8, i8* %i, i64 2
+ %i7 = bitcast i8* %i6 to i16*
+ %i8 = load i16, i16* %i7, align 2
+ %i9 = sext i16 %i8 to i32
+ br label %bb10
-; <label>:11 ; preds = %0, %6
- %12 = phi i32 [ %10, %6 ], [ 0, %0 ]
- ret i32 %12
+bb10: ; preds = %bb5, %bb
+ %i11 = phi i32 [ %i9, %bb5 ], [ 0, %bb ]
+ ret i32 %i11
}
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