[PATCH] D141119: [AArch64] Fold And/Or into CSel if possible
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 6 03:09:16 PST 2023
dmgreen created this revision.
dmgreen added reviewers: samtebbs, bipmis, SjoerdMeijer, labrinea, spatel.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
dmgreen requested review of this revision.
Herald added a project: LLVM.
If we have `and x, (csel 0, 1, cc)` and we know that x is 0/1, then we can emit a `csel ZR, x, cc`. Similarly for 'or x, (csel 0, 1, cc)` we can emit `csinc x, ZR, cc`. This can help where we can not otherwise general ccmp instructions.
https://reviews.llvm.org/D141119
Files:
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/test/CodeGen/AArch64/arm64-ccmp.ll
llvm/test/CodeGen/AArch64/bcmp.ll
llvm/test/CodeGen/AArch64/csel-andor-onebit.ll
llvm/test/CodeGen/AArch64/i128-math.ll
llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
llvm/test/CodeGen/AArch64/urem-vector-lkk.ll
llvm/test/CodeGen/AArch64/vec_umulo.ll
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