[PATCH] D140347: SelectionDAG: Teach ComputeKnownBits about VSCALE

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 6 01:49:06 PST 2023


foad added a comment.

> I think the multiplier can be negative (see the _with_negative_multiplier tests).

This needs documenting. Speciflcally, for the ISD::VSCALE node, if the output is wider than the input, does it zero- or sign-extend the input? (Or to put it another way, does it do an unsigned extending multiply or a signed extending multiply?)


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https://reviews.llvm.org/D140347



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