[PATCH] D141089: [InstCombine] Fix potentially buggy code in `((%x & C) == 0) --> %x u< (-C)` transform

Noah Goldstein via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 5 14:24:41 PST 2023


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Its possible for C2 to have set bits that are known not-needed
(zeroable). See: D140858 <https://reviews.llvm.org/D140858>

`+` will overflow here, `|` will get the right logic.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141089

Files:
  llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp


Index: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -1722,7 +1722,7 @@
     APInt NewC2 = *C2;
     KnownBits Know = computeKnownBits(And->getOperand(0), 0, And);
     // Set high zeros of C2 to allow matching negated power-of-2.
-    NewC2 = *C2 + APInt::getHighBitsSet(C2->getBitWidth(),
+    NewC2 = *C2 | APInt::getHighBitsSet(C2->getBitWidth(),
                                         Know.countMinLeadingZeros());
 
     // Restrict this fold only for single-use 'and' (PR10267).


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