[llvm] 91f1c59 - [NFC][X86] Add few more tests for freezing BUILD_VECTOR

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2023-01-04T21:16:11+03:00
New Revision: 91f1c59fcdf5b7b2f023fa05c6fbd75ce0140a50

URL: https://github.com/llvm/llvm-project/commit/91f1c59fcdf5b7b2f023fa05c6fbd75ce0140a50
DIFF: https://github.com/llvm/llvm-project/commit/91f1c59fcdf5b7b2f023fa05c6fbd75ce0140a50.diff

LOG: [NFC][X86] Add few more tests for freezing BUILD_VECTOR

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/freeze-vector.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll
index 69f238660ea9..1dec0a454cb0 100644
--- a/llvm/test/CodeGen/X86/freeze-vector.ll
+++ b/llvm/test/CodeGen/X86/freeze-vector.ll
@@ -434,6 +434,55 @@ define void @freeze_two_buildvectors_only_one_frozen(ptr %origin0, ptr %origin1,
   ret void
 }
 
+define void @freeze_two_buildvectors_one_undef_elt(ptr %origin0, ptr %origin1, ptr %dst0, ptr %dst1) nounwind {
+; X86-LABEL: freeze_two_buildvectors_one_undef_elt:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    movl (%edx), %edx
+; X86-NEXT:    andl $15, %edx
+; X86-NEXT:    vmovd %eax, %xmm0
+; X86-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
+; X86-NEXT:    vmovd %edx, %xmm1
+; X86-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; X86-NEXT:    vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7]
+; X86-NEXT:    vmovddup {{.*#+}} xmm2 = [7,7]
+; X86-NEXT:    # xmm2 = mem[0,0]
+; X86-NEXT:    vpand %xmm2, %xmm0, %xmm0
+; X86-NEXT:    vmovdqa %xmm0, (%ecx)
+; X86-NEXT:    vpand %xmm2, %xmm1, %xmm0
+; X86-NEXT:    vmovdqa %xmm0, (%eax)
+; X86-NEXT:    retl
+;
+; X64-LABEL: freeze_two_buildvectors_one_undef_elt:
+; X64:       # %bb.0:
+; X64-NEXT:    movq (%rdi), %rax
+; X64-NEXT:    andl $15, %eax
+; X64-NEXT:    vmovq %rax, %xmm0
+; X64-NEXT:    vmovq %rax, %xmm1
+; X64-NEXT:    vpbroadcastq %xmm1, %xmm1
+; X64-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; X64-NEXT:    vmovdqa {{.*#+}} xmm2 = [7,7]
+; X64-NEXT:    vpand %xmm2, %xmm0, %xmm0
+; X64-NEXT:    vmovdqa %xmm0, (%rdx)
+; X64-NEXT:    vpand %xmm2, %xmm1, %xmm0
+; X64-NEXT:    vmovdqa %xmm0, (%rcx)
+; X64-NEXT:    retq
+  %i0.src = load i64, ptr %origin0
+  %i0 = and i64 %i0.src, 15
+  %i1.src = load i64, ptr %origin1
+  %i1 = and i64 %i0.src, 15
+  %i2 = insertelement <2 x i64> poison, i64 %i0, i64 0
+  %i3 = and <2 x i64> %i2, <i64 7, i64 7>
+  %i4 = freeze <2 x i64> %i3
+  store <2 x i64> %i4, ptr %dst0
+  %i5 = insertelement <2 x i64> poison, i64 %i1, i64 1
+  %i6 = and <2 x i64> %i5, <i64 7, i64 7>
+  store <2 x i64> %i6, ptr %dst1
+  ret void
+}
+
 define void @freeze_buildvector(ptr %origin0, ptr %origin1, ptr %origin2, ptr %origin3, ptr %dst) nounwind {
 ; X86-LABEL: freeze_buildvector:
 ; X86:       # %bb.0:
@@ -482,6 +531,48 @@ define void @freeze_buildvector(ptr %origin0, ptr %origin1, ptr %origin2, ptr %o
   ret void
 }
 
+define void @freeze_buildvector_one_undef_elt(ptr %origin0, ptr %origin1, ptr %origin2, ptr %origin3, ptr %dst) nounwind {
+; X86-LABEL: freeze_buildvector_one_undef_elt:
+; X86:       # %bb.0:
+; X86-NEXT:    pushl %esi
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT:    vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-NEXT:    vpinsrd $1, (%edx), %xmm0, %xmm0
+; X86-NEXT:    vpinsrd $2, %eax, %xmm0, %xmm0
+; X86-NEXT:    vpinsrd $3, (%ecx), %xmm0, %xmm0
+; X86-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
+; X86-NEXT:    vmovdqa %xmm0, (%eax)
+; X86-NEXT:    popl %esi
+; X86-NEXT:    retl
+;
+; X64-LABEL: freeze_buildvector_one_undef_elt:
+; X64:       # %bb.0:
+; X64-NEXT:    vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X64-NEXT:    vpinsrd $1, (%rsi), %xmm0, %xmm0
+; X64-NEXT:    vpinsrd $2, %eax, %xmm0, %xmm0
+; X64-NEXT:    vpinsrd $3, (%rcx), %xmm0, %xmm0
+; X64-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [7,7,7,7]
+; X64-NEXT:    vpand %xmm1, %xmm0, %xmm0
+; X64-NEXT:    vmovdqa %xmm0, (%r8)
+; X64-NEXT:    retq
+  %i0.src = load i32, ptr %origin0
+  %i1.src = load i32, ptr %origin1
+  %i3.src = load i32, ptr %origin3
+  %i0 = and i32 %i0.src, 15
+  %i1 = and i32 %i1.src, 15
+  %i3 = and i32 %i3.src, 15
+  %i4 = insertelement <4 x i32> poison, i32 %i0, i64 0
+  %i5 = insertelement <4 x i32> %i4, i32 %i1, i64 1
+  %i7 = insertelement <4 x i32> %i5, i32 %i3, i64 3
+  %i8 = freeze <4 x i32> %i7
+  %i9 = and <4 x i32> %i8, <i32 7, i32 7, i32 7, i32 7>
+  store <4 x i32> %i9, ptr %dst
+  ret void
+}
+
 define void @freeze_buildvector_extrause(ptr %origin0, ptr %origin1, ptr %origin2, ptr %origin3, ptr %dst, ptr %escape) nounwind {
 ; X86-LABEL: freeze_buildvector_extrause:
 ; X86:       # %bb.0: