[PATCH] D140570: [AVR] Optimize 32-bit shift: move bytes around

[Ben Shi via Phabricator via llvm-commits]

benshi001 added inline comments.


================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:1878
+    // Zero or sign extend the most significant register.
+    if (ShrExtendReg == 0) {
+      ShrExtendReg = MRI.createVirtualRegister(&AVR::GPR8RegClass);
----------------
I think this `if (ShrExtendReg == 0)` can be moved out of current loop, something like

```
Register ShrExtendReg = 0;
if (ShiftAmt >= 8) {
  auto &MSBReg = Regs[0];
  ShrExtendReg = MRI.createVirtualRegister(&AVR::GPR8RegClass);
  if (ArithmeticShift) {
    ...
  } else {
    ...
  }
}
while (ShiftAmt >= 8) {
  Regs[0] = std::pair(ShrExtendReg, 0);
  Regs = Regs.drop_front(1);
  ShiftAmt -= 8;
}
```

Actually 
1. we need not check `if (ShrExtendReg == 0)` time and time again.
2. we need not expose `auto &MSBReg = Regs[0]` which is only used locally.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D140570/new/

https://reviews.llvm.org/D140570