[PATCH] D140570: [AVR] Optimize 32-bit shift: move bytes around
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 25 19:49:07 PST 2022
benshi001 added inline comments.
================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:1853
+ // zero the bottom registers.
+ auto MSBReg = Regs[0];
+ Register ShrExtendReg = 0;
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These two variables are only used inside `while (ShiftAmt >= 8)`, so how about moving them down to the head of the loop ?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140570/new/
https://reviews.llvm.org/D140570
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