[PATCH] D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 25 19:06:15 PST 2022
HsiangKai updated this revision to Diff 485262.
HsiangKai added a comment.
Remove unnecessary fast-math flags in the test cases.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140602/new/
https://reviews.llvm.org/D140602
Files:
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/test/CodeGen/RISCV/machine-combiner.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D140602.485262.patch
Type: text/x-patch
Size: 4165 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20221226/1c7380ef/attachment.bin>
More information about the llvm-commits
mailing list