[PATCH] D140645: Add tests for atomic bittest with register/memory operands

Phoebe Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 23 20:25:12 PST 2022


pengfei added a comment.

The test is so large! Are we over testing for this feature?
Beside, split the test to another patch and only lieve diff here.



================
Comment at: llvm/test/CodeGen/X86/atomic-rm-bit-test.ll:2-6
+; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=-bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X86-NOBMI2
+; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X86-NOBMI2
+; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X86-NOBMI2
+; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi,+bmi2 < %s | FileCheck %s --check-prefixes=X86-BMI2
+; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi,+bmi2 < %s | FileCheck %s --check-prefixes=X86-BMI2
----------------
Does having `bmi/bmi2` affect the selection to bts?


================
Comment at: llvm/test/CodeGen/X86/atomic-rm-bit-test.ll:13
+
+define i16 @atomic_shl1_xor_16_gpr_val(ptr %v, i16 %c) {
+; X86-NOBMI2-LABEL: atomic_shl1_xor_16_gpr_val:
----------------
Use `nounwind` to suppress the cfi* directives.


================
Comment at: llvm/test/CodeGen/X86/atomic-rm-bit-test.ll:30
+; X86-NOBMI2-NEXT:    # kill: def $ax killed $ax killed $eax
+; X86-NOBMI2-NEXT:    lock cmpxchgw %cx, (%esi)
+; X86-NOBMI2-NEXT:    # kill: def $ax killed $ax def $eax
----------------
Why still generating `cmpxchg`?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D140645/new/

https://reviews.llvm.org/D140645



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