[PATCH] D137517: [TargetParser] Generate the defs for RISCV CPUs using llvm-tblgen.

Wed Dec 21 19:50:51 PST 2022

pcwang-thead added a comment.

In D137517#4009175 <https://reviews.llvm.org/D137517#4009175>, @fpetrogalli wrote:

> @pcwang-thead, I addressed some of your comments.
>
> The value of `EnumFeatures` is now computed dynamicaly from the
> `Features` field of the `Processor` class.

Thanks! That sounds great to me!

> As for generating `MArch` out of the `Features` field, @craig.topper
> pointed me at
> https://github.com/riscv-non-isa/riscv-toolchain-conventions/issues/11. From
> the reading of it, it seems that the alphabetical order is enough to
> build the string that carries `MArch`. Am I missing something?

Currently, I think the alphabetical order is OK. If we relax the checking of arch string someday, there is no doubt that we should change the implementation here too.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137517/new/

https://reviews.llvm.org/D137517