[PATCH] D138097: [BOLT][AArch64] Handle adrp+ld64 linker relaxations

[Vladislav Khmelevsky via Phabricator via llvm-commits]

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Comment at: bolt/test/AArch64/got-ld64-relaxation.test:1
+// This test checks that ADR+LDR instruction sequence relaxed by the linker
+// to the ADR+ADD sequence is properly reconized and handled by bolt
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maksfb wrote:
> yota9 wrote:
> > maksfb wrote:
> > > Does it make sense to generate a test case with lld similar to x86 GOTPCRELX test in D126747?
> > The thing is that the linker will relax it to the adr + nop due to small size of the final binary. Such a case is already handled in skipRelocationProcessAArch64, but for adrp+add case it is better to use pre-built binary
> You can make the binary artificially bigger with `.zero/.skip` directives.
Well you're right, I was thinking about rept one. Usually I won't use it since it is quite slow and I'm not sure how big binary is OK to use in CI, but in this case it is just 1MB, so it is probably fine to use here.. Also a greater number of bytes really slows down the build. But again I think 1MB is good-enough limit to use in such tests.. 


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https://reviews.llvm.org/D138097