[PATCH] D140283: [RISCV] Move -riscv-v-vector-bits-max/min options to RISCVTargetMachine.

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 19 08:17:54 PST 2022

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reames accepted this revision.
reames added a comment.

LGTM


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  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D140283/new/

https://reviews.llvm.org/D140283

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