[PATCH] D140283: [RISCV] Move -riscv-v-vector-bits-max/min options to RISCVTargetMachine.

Kito Cheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 19 00:15:01 PST 2022

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kito-cheng accepted this revision.
kito-cheng added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140283/new/

https://reviews.llvm.org/D140283

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