[PATCH] D139609: [AArch64][DAGCombiner] fold instruction BIC from ISD::AND

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 added a comment.

In D139609#3998214 <https://reviews.llvm.org/D139609#3998214>, @dmgreen wrote:

> Hello. In general we have found it is better to avoid AArch64ISD nodes if possible. That way the benefits from generic dag combines keep applying, as opposed to becoming black boxes that the rest of the optimizer cannot see. Sometimes they are necessary, and that might be the case here, but is it possible to just adjust the code using standard nodes? It doesn't seem like this applies very often though - perhaps that makes it OK in this case.

The headache thing here is DAGCombiner will revert the pattern to the origin if I use standard node. So I try to add a new AArch64ISD.


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https://reviews.llvm.org/D139609