[PATCH] D139673: [AMDGPU][SIFrameLowering] Mark VGPR used for AGPR spills as reserved

[Jeffrey Byrnes via Phabricator via llvm-commits]

jrbyrnes added inline comments.


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Comment at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:906
+  void reserveReg(MCRegister PhysReg) {
+    ReservedRegs.set(PhysReg);
+  }
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arsenm wrote:
> This needs to consider all aliasing registers. This also needs a warning that this cannot be used in the middle of a walk in a function or when you have liveness info available
Hey Matt -- thanks for comments thus far. Regarding the warning -- were you thinking programmatically enforcing these conditions (e.g. via assert) or a literal warning in comment? Not sure how we can enforce this state with MRI


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https://reviews.llvm.org/D139673