[PATCH] D140046: [PowerPC] Fix up memory ordering after combining BV to a load

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 16 07:02:26 PST 2022


RKSimon added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:11500
     return false;
-  EVT VT = LD->getValueType(0);
+  EVT VT = LD->getMemoryVT();
   if (VT.getSizeInBits() / 8 != Bytes)
----------------
efriedma wrote:
> nemanjai wrote:
> > @efriedma @RKSimon Do you see any issues with switching this? It seems that we should be checking the memory type to determine if loads are consecutive. This is also required in order to use this query for extending loads for PPC.
> I think all the existing uses exclude extending loads?  Seems fine.
an assertion/earlyout for extend loads might make sense?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140046/new/

https://reviews.llvm.org/D140046



More information about the llvm-commits mailing list