[PATCH] D139386: [RISCV][THEAD] Vendor extensions: Add 'XTheadVdot' T-Head vendor extensions

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

Next step to make progress here is to strip out everything which isn't related to MC (assembler and disassembler).  The intrinsic codegen changes should be a separate patch.



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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td:1
+//===-- RISCVInstrInfoXTHead.td ----------------------------*- tablegen -*-===//
+//
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Minor: Splitting this off into three different files seems to have little value to me.  I would merge all the contents of XTHead* into the root file.  If we add further extensions where the division becomes worthwhile, we can split at that time.


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Comment at: llvm/test/CodeGen/RISCV/xtheadvdot/vmaqa.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xtheadvdot \
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Minor: These dependent on vector, so they should be in the rvv subtree.

Naming wise, I'd stop the xtheadvdot directory, and just prefix the paths.  

Ex: test/CodeGen/RISCV/rvv/xtheadvdot-vmaqa.ll


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  https://reviews.llvm.org/D139386/new/

https://reviews.llvm.org/D139386