[PATCH] D135229: [AArch64] Extending lowering of 'trunc <(8|16) x i64> %x to <(8|16) x i8>' to use tbl instructions

[Florian Hahn via Phabricator via llvm-commits]

fhahn accepted this revision.
fhahn added a comment.
This revision is now accepted and ready to land.

LGTM with the inline suggestions. Please wait a day or so with committing in case there are additional comments.



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13801
+  unsigned TruncFactor =
+      SrcElemTySz / cast<IntegerType>(DstTy->getElementType())->getBitWidth();
+  assert((SrcElemTySz == 16 || SrcElemTySz == 32 || SrcElemTySz == 64) &&
----------------
could you add an assert to make sure the division happens without remainder?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13814
+      MaskConst.push_back(ConstantInt::get(
+          Builder.getInt8Ty(), IsLittleEndian
+                                   ? Itr * TruncFactor
----------------
Could use `Builder.getInt8(....)`?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13841
+
+    if (Parts.size() >= 4) {
+      auto *F = Intrinsic::getDeclaration(TI->getModule(),
----------------
IIUC the only case that can happen here is that `Parts == 4`, right? Might be good to update the check.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D135229/new/

https://reviews.llvm.org/D135229