[llvm] 37e6f84 - [AMDGPU][GFX10][DOC][NFC] Update assembler syntax description
Dmitry Preobrazhensky via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 13 03:39:44 PST 2022
Author: Dmitry Preobrazhensky
Date: 2022-12-13T14:36:43+03:00
New Revision: 37e6f84026217b95e25306a0fa02fe408cbf9dc8
URL: https://github.com/llvm/llvm-project/commit/37e6f84026217b95e25306a0fa02fe408cbf9dc8
DIFF: https://github.com/llvm/llvm-project/commit/37e6f84026217b95e25306a0fa02fe408cbf9dc8.diff
LOG: [AMDGPU][GFX10][DOC][NFC] Update assembler syntax description
Summary of changes:
- Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205).
- Enable abs and neg modifiers for v_cndmask_b32_dpp (https://reviews.llvm.org/D135900).
- Enable literal operands for permlane16/permlanex16 (https://reviews.llvm.org/D137332).
- Enable omod modifiers for v_max3_f16, v_min3_f16, etc. (https://reviews.llvm.org/D139469).
- Correct v_mov_b32_sdwa (it does not support abs and neg input modifiers yet).
- Enable tfe modifier for MUBUF loads (https://reviews.llvm.org/D137783).
- Enable image_gather4h (https://reviews.llvm.org/D130764).
- Minor corrections and improvements.
Added:
llvm/docs/AMDGPU/gfx10_imm16_0533c2.rst
llvm/docs/AMDGPU/gfx10_imm16_169952.rst
llvm/docs/AMDGPU/gfx10_m_28b494.rst
llvm/docs/AMDGPU/gfx10_m_c141fc.rst
llvm/docs/AMDGPU/gfx10_sbase_b0aa25.rst
llvm/docs/AMDGPU/gfx10_sdata_5e9fb5.rst
llvm/docs/AMDGPU/gfx10_sdata_90678d.rst
llvm/docs/AMDGPU/gfx10_sdata_c1aec6.rst
llvm/docs/AMDGPU/gfx10_soffset_0f304c.rst
llvm/docs/AMDGPU/gfx10_srsrc_80eef6.rst
llvm/docs/AMDGPU/gfx10_ssrc_bb715c.rst
llvm/docs/AMDGPU/gfx10_vaddr_a5639c.rst
llvm/docs/AMDGPU/gfx10_vdata_21b58d.rst
llvm/docs/AMDGPU/gfx10_vdata_2d6239.rst
llvm/docs/AMDGPU/gfx10_vdata_4b260e.rst
llvm/docs/AMDGPU/gfx10_vdata_84fab6.rst
llvm/docs/AMDGPU/gfx10_vdata_aa5a53.rst
llvm/docs/AMDGPU/gfx10_vdata_ad559c.rst
llvm/docs/AMDGPU/gfx10_vdst_5d50a1.rst
llvm/docs/AMDGPU/gfx10_vdst_5ec176.rst
llvm/docs/AMDGPU/gfx10_vdst_875645.rst
llvm/docs/AMDGPU/gfx10_vdst_a49b76.rst
llvm/docs/AMDGPU/gfx10_vdst_d7c57e.rst
llvm/docs/AMDGPU/gfx10_vdst_dfa6da.rst
llvm/docs/AMDGPU/gfx10_vdst_eae4c8.rst
llvm/docs/AMDGPU/gfx10_vdst_f47754.rst
llvm/docs/AMDGPU/gfx10_vsrc_ba3116.rst
Modified:
llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst
llvm/docs/AMDGPU/gfx10_fx_operand.rst
llvm/docs/AMDGPU/gfx10_hwreg.rst
llvm/docs/AMDGPU/gfx10_label.rst
llvm/docs/AMDGPU/gfx10_msg.rst
llvm/docs/AMDGPU/gfx10_tgt.rst
llvm/docs/AMDGPU/gfx10_type_deviation.rst
llvm/docs/AMDGPU/gfx10_waitcnt.rst
llvm/docs/AMDGPU/gfx10_waitcnt_depctr.rst
Removed:
llvm/docs/AMDGPU/gfx10_imm16_73139a.rst
llvm/docs/AMDGPU/gfx10_imm16_a04fb3.rst
llvm/docs/AMDGPU/gfx10_m_254bcb.rst
llvm/docs/AMDGPU/gfx10_m_f5d306.rst
llvm/docs/AMDGPU/gfx10_sbase_010ce0.rst
llvm/docs/AMDGPU/gfx10_sdata_3d2ab7.rst
llvm/docs/AMDGPU/gfx10_sdata_7e874d.rst
llvm/docs/AMDGPU/gfx10_sdata_c6aec1.rst
llvm/docs/AMDGPU/gfx10_soffset_d01a5c.rst
llvm/docs/AMDGPU/gfx10_srsrc_e73d16.rst
llvm/docs/AMDGPU/gfx10_ssrc_9a4448.rst
llvm/docs/AMDGPU/gfx10_vaddr_cdc744.rst
llvm/docs/AMDGPU/gfx10_vdata_0aba12.rst
llvm/docs/AMDGPU/gfx10_vdata_15d255.rst
llvm/docs/AMDGPU/gfx10_vdata_16d321.rst
llvm/docs/AMDGPU/gfx10_vdata_35851e.rst
llvm/docs/AMDGPU/gfx10_vdata_890652.rst
llvm/docs/AMDGPU/gfx10_vdata_a9ff5a.rst
llvm/docs/AMDGPU/gfx10_vdst_2ea017.rst
llvm/docs/AMDGPU/gfx10_vdst_322561.rst
llvm/docs/AMDGPU/gfx10_vdst_3d7dcf.rst
llvm/docs/AMDGPU/gfx10_vdst_473a69.rst
llvm/docs/AMDGPU/gfx10_vsrc_533a4e.rst
################################################################################
diff --git a/llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst b/llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst
index f85294f9f47b2..f223f6c674a00 100644
--- a/llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst
+++ b/llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst
@@ -39,64 +39,64 @@ DPP16
**INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
v_add_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_add_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_add_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_add_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_add_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_add_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_and_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_ceil_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_ceil_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cos_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cos_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_f16_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_ceil_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_ceil_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cos_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cos_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_f16_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_cvt_f16_i16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_cvt_f16_u16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_cvt_f32_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_cvt_f32_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_cvt_f32_ubyte0_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_cvt_f32_ubyte1_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_cvt_f32_ubyte2_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_cvt_f32_ubyte3_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_flr_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_norm_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_norm_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_flr_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_norm_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_norm_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_cvt_off_f32_i4_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_pkrtz_f16_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_rpi_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_cvt_u32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_exp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_exp_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_pkrtz_f16_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_rpi_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_cvt_u32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_exp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_exp_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_ffbh_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_ffbh_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_ffbl_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_floor_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_floor_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_fmac_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_fmac_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_fract_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_fract_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_frexp_exp_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_frexp_exp_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_frexp_mant_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_frexp_mant_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_log_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_log_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_floor_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_floor_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_fmac_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_fmac_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_fract_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_fract_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_frexp_exp_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_frexp_exp_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_frexp_mant_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_frexp_mant_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_log_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_log_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_max_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_max_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_max_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_max_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_max_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_max_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_min_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_min_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_min_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_min_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_min_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_min_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_mov_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
@@ -104,37 +104,37 @@ DPP16
v_movrels_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_movrelsd_2_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_movrelsd_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_mul_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_mul_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_mul_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_mul_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_mul_hi_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_mul_hi_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_mul_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_mul_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_mul_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_mul_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_not_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_or_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_rcp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_rcp_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_rndne_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_rndne_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_rsq_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_rsq_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_rcp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_rcp_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_rndne_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_rndne_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_rsq_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_rsq_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_sat_pk_u8_i16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_sin_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_sin_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_sqrt_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_sqrt_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_sin_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_sin_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_sqrt_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_sqrt_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_sub_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_sub_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_sub_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_sub_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_sub_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_sub_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_subrev_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_subrev_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_subrev_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_subrev_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_subrev_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_subrev_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_trunc_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
- v_trunc_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_trunc_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
+ v_trunc_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_xnor_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
v_xor_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
@@ -414,7 +414,7 @@ EXP
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- exp :ref:`tgt<amdgpu_synid_gfx10_tgt>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_533a4e>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_533a4e>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc_533a4e>`, :ref:`vsrc3<amdgpu_synid_gfx10_vsrc_533a4e>` :ref:`done<amdgpu_synid_done>` :ref:`compr<amdgpu_synid_compr>` :ref:`vm<amdgpu_synid_vm>`
+ exp :ref:`tgt<amdgpu_synid_gfx10_tgt>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_ba3116>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_ba3116>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc_ba3116>`, :ref:`vsrc3<amdgpu_synid_gfx10_vsrc_ba3116>` :ref:`done<amdgpu_synid_done>` :ref:`compr<amdgpu_synid_compr>` :ref:`vm<amdgpu_synid_vm>`
FLAT
----
@@ -561,114 +561,115 @@ MIMG
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- image_atomic_add :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_and :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_a9ff5a>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_dec :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_fcmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_a9ff5a>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_fmax :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_fmin :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_inc :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_or :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_smax :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_smin :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_sub :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_swap :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_umax :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_umin :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_atomic_xor :ref:`vdata<amdgpu_synid_gfx10_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_gather4 :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_b :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_b :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_l :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_l :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_o :ref:`vdst<amdgpu_synid_gfx10_vdst_2ea017>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_get_lod :ref:`vdst<amdgpu_synid_gfx10_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
- image_get_resinfo :ref:`vdst<amdgpu_synid_gfx10_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
- image_load :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_load_mip :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_load_mip_pck :ref:`vdst<amdgpu_synid_gfx10_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
- image_load_mip_pck_sgn :ref:`vdst<amdgpu_synid_gfx10_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
- image_load_pck :ref:`vdst<amdgpu_synid_gfx10_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
- image_load_pck_sgn :ref:`vdst<amdgpu_synid_gfx10_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
- image_sample :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_b :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_b :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_l :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_l :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_o :ref:`vdst<amdgpu_synid_gfx10_vdst_473a69>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_store :ref:`vdata<amdgpu_synid_gfx10_vdata_15d255>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_store_mip :ref:`vdata<amdgpu_synid_gfx10_vdata_15d255>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
- image_store_mip_pck :ref:`vdata<amdgpu_synid_gfx10_vdata_c08393>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
- image_store_pck :ref:`vdata<amdgpu_synid_gfx10_vdata_c08393>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_cdc744>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_add :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_and :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_84fab6>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_dec :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_fcmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_84fab6>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_fmax :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_fmin :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_inc :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_or :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_smax :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_smin :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_sub :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_swap :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_umax :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_umin :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_atomic_xor :ref:`vdata<amdgpu_synid_gfx10_vdata_aa5a53>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_gather4 :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_b :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_b :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_l :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_l :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_o :ref:`vdst<amdgpu_synid_gfx10_vdst_5ec176>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4h :ref:`vdst<amdgpu_synid_gfx10_vdst_69a144>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_get_lod :ref:`vdst<amdgpu_synid_gfx10_vdst_dfa6da>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_get_resinfo :ref:`vdst<amdgpu_synid_gfx10_vdst_dfa6da>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_load :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_load_mip :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_load_mip_pck :ref:`vdst<amdgpu_synid_gfx10_vdst_dfa6da>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_load_mip_pck_sgn :ref:`vdst<amdgpu_synid_gfx10_vdst_dfa6da>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_load_pck :ref:`vdst<amdgpu_synid_gfx10_vdst_dfa6da>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_load_pck_sgn :ref:`vdst<amdgpu_synid_gfx10_vdst_dfa6da>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_sample :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_b :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_b :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_l :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_l :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_o :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_store :ref:`vdata<amdgpu_synid_gfx10_vdata_21b58d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_store_mip :ref:`vdata<amdgpu_synid_gfx10_vdata_21b58d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
+ image_store_mip_pck :ref:`vdata<amdgpu_synid_gfx10_vdata_c08393>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
+ image_store_pck :ref:`vdata<amdgpu_synid_gfx10_vdata_c08393>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_a5639c>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>`
MTBUF
-----
@@ -677,22 +678,22 @@ MTBUF
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- tbuffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- tbuffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- tbuffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- tbuffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- tbuffer_load_format_x :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- tbuffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- tbuffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_81a6ed>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- tbuffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_dd8a32>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- tbuffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_x :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_56f215>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_e016a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
+ tbuffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
+ tbuffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
+ tbuffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
+ tbuffer_load_format_x :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
+ tbuffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
+ tbuffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_81a6ed>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
+ tbuffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_dd8a32>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
+ tbuffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_x :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_56f215>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_e016a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
MUBUF
-----
@@ -700,79 +701,79 @@ MUBUF
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- buffer_atomic_add :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_add_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_and :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_and_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_cmpswap_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_890652>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_dec :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_dec_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_fcmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_fcmpswap_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_890652>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_fmax :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_fmax_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_fmin :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_fmin_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_inc :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_inc_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_or :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_or_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smax :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smax_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smin :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smin_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_sub :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_sub_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_swap :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_swap_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umax :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umax_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umin :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umin_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_xor :ref:`vdata<amdgpu_synid_gfx10_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_xor_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ buffer_atomic_add :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_add_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_and :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_and_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_cmpswap_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_2d6239>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_dec :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_dec_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_fcmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_fcmpswap_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_2d6239>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_fmax :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_fmax_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_fmin :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_fmin_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_inc :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_inc_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_or :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_or_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smax :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smax_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smin :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smin_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_sub :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_sub_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_swap :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_swap_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umax :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umax_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umin :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umin_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_xor :ref:`vdata<amdgpu_synid_gfx10_vdata_ad559c>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_xor_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_4b260e>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
buffer_gl0_inv
buffer_gl1_inv
- buffer_load_dword :ref:`vdst<amdgpu_synid_gfx10_vdst_322561>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx10_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx10_vdst_81a6ed>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx10_vdst_dd8a32>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_format_x :ref:`vdst<amdgpu_synid_gfx10_vdst_322561>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_81a6ed>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_dd8a32>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_sbyte :ref:`vdst<amdgpu_synid_gfx10_vdst_322561>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_short_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_sshort :ref:`vdst<amdgpu_synid_gfx10_vdst_322561>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_ubyte :ref:`vdst<amdgpu_synid_gfx10_vdst_322561>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
- buffer_load_ushort :ref:`vdst<amdgpu_synid_gfx10_vdst_322561>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_store_byte :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_byte_d16_hi :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dword :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dwordx2 :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dwordx3 :ref:`vdata<amdgpu_synid_gfx10_vdata_56f215>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dwordx4 :ref:`vdata<amdgpu_synid_gfx10_vdata_e016a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_x :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_56f215>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_e016a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_short :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_short_d16_hi :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_dword :ref:`vdst<amdgpu_synid_gfx10_vdst_875645>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx10_vdst_d7c57e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx10_vdst_a49b76>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx10_vdst_f47754>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx10_vdst_5d50a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_5d50a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_d7c57e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_d7c57e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_format_x :ref:`vdst<amdgpu_synid_gfx10_vdst_875645>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_d7c57e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_a49b76>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_f47754>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_sbyte :ref:`vdst<amdgpu_synid_gfx10_vdst_875645>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst_5d50a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst_5d50a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_short_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst_5d50a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst_5d50a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_sshort :ref:`vdst<amdgpu_synid_gfx10_vdst_875645>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_ubyte :ref:`vdst<amdgpu_synid_gfx10_vdst_875645>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst_5d50a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst_5d50a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_load_ushort :ref:`vdst<amdgpu_synid_gfx10_vdst_875645>`::ref:`opt<amdgpu_synid_gfx10_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` :ref:`tfe<amdgpu_synid_tfe>`
+ buffer_store_byte :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_byte_d16_hi :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dword :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dwordx2 :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dwordx3 :ref:`vdata<amdgpu_synid_gfx10_vdata_56f215>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dwordx4 :ref:`vdata<amdgpu_synid_gfx10_vdata_e016a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_x :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx10_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_56f215>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_e016a1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_short :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_short_d16_hi :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_b556e6>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
SDWA
----
@@ -781,226 +782,226 @@ SDWA
**INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_add_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_add_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_add_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_add_nc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_and_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_bfrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ceil_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ceil_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cmp_class_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_class_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_neq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_neq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ngt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ngt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nle_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nle_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_o_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_o_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_t_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_t_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_tru_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_tru_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_u_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_u_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_class_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_class_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lg_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lg_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_neq_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_neq_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nge_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nge_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ngt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ngt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nle_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nle_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlg_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlg_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_o_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_o_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_t_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_t_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_tru_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_tru_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_u_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_u_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cndmask_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cos_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cos_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f16_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f16_i16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f16_u16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte0_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte1_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte2_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte3_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_flr_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_norm_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_norm_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_add_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_nc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_and_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_bfrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ceil_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ceil_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cmp_class_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_class_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_neq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_neq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ngt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ngt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nle_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nle_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_o_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_o_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_t_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_t_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_tru_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_tru_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_u_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_u_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_class_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_class_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lg_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lg_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_neq_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_neq_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nge_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nge_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ngt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ngt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nle_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nle_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlg_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlg_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_o_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_o_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_t_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_t_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_tru_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_tru_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_u_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_u_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cndmask_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cos_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cos_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f16_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f16_i16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f16_u16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_e0345d>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte0_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte1_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte2_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte3_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_flr_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_norm_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_norm_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
v_cvt_off_f32_i4_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_pkrtz_f16_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cvt_rpi_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_u32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_exp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_exp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ffbh_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ffbh_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ffbl_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_floor_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_floor_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_fract_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_fract_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_exp_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_exp_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_mant_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_mant_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ldexp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_log_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_log_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mov_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_movreld_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_movrels_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_movrelsd_2_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_movrelsd_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_mul_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_hi_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_hi_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_not_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_or_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_rcp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rcp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rcp_iflag_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rndne_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rndne_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rsq_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rsq_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sat_pk_u8_i16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sin_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sin_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sqrt_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sqrt_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sub_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_nc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_nc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_trunc_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_trunc_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_xor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cvt_pkrtz_f16_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cvt_rpi_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_u32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_exp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_exp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ffbh_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ffbh_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ffbl_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_floor_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_floor_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_fract_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_fract_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_exp_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_exp_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_mant_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_mant_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ldexp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_log_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_log_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mov_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_movreld_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_movrels_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_movrelsd_2_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_movrelsd_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_mul_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_hi_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_hi_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_not_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_or_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_rcp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rcp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rcp_iflag_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rndne_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rndne_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rsq_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rsq_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sat_pk_u8_i16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sin_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sin_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sqrt_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sqrt_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sub_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_nc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_nc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_trunc_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_trunc_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_xor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>`, :ref:`src1<amdgpu_synid_gfx10_src_37d670>`::ref:`m<amdgpu_synid_gfx10_m_28b494>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
SMEM
----
@@ -1010,67 +1011,67 @@ SMEM
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
s_atc_probe :ref:`probe<amdgpu_synid_gfx10_probe>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>`
- s_atc_probe_buffer :ref:`probe<amdgpu_synid_gfx10_probe>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>`
- s_atomic_add :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_and :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_c6aec1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_dec :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_inc :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_or :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smax :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smin :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_sub :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_swap :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umax :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umin :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_xor :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_add :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_and :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_c6aec1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_dec :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_inc :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_or :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smax :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smin :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_sub :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_swap :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umax :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umin :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_xor :ref:`sdata<amdgpu_synid_gfx10_sdata_3d2ab7>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_7e874d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dword :ref:`sdst<amdgpu_synid_gfx10_sdst_54e16e>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
- s_buffer_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx10_sdst_3bc700>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
- s_buffer_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx10_sdst_386c33>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
- s_buffer_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx10_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
- s_buffer_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx10_sdst_362c37>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
- s_buffer_store_dword :ref:`sdata<amdgpu_synid_gfx10_sdata_6fbc49>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx10_sdata_81ba27>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx10_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_d01a5c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_atc_probe_buffer :ref:`probe<amdgpu_synid_gfx10_probe>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>`
+ s_atomic_add :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_and :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_c1aec6>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_dec :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_inc :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_or :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smax :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smin :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_sub :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_swap :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umax :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umin :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_xor :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_add :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_and :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_c1aec6>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_dec :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_inc :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_or :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smax :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smin :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_sub :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_swap :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umax :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umin :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_xor :ref:`sdata<amdgpu_synid_gfx10_sdata_5e9fb5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_90678d>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dword :ref:`sdst<amdgpu_synid_gfx10_sdst_54e16e>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
+ s_buffer_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx10_sdst_3bc700>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
+ s_buffer_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx10_sdst_386c33>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
+ s_buffer_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx10_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
+ s_buffer_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx10_sdst_362c37>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
+ s_buffer_store_dword :ref:`sdata<amdgpu_synid_gfx10_sdata_6fbc49>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx10_sdata_81ba27>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx10_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_0f304c>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
s_dcache_discard :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>`
s_dcache_discard_x2 :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_73dae7>` :ref:`offset21s<amdgpu_synid_smem_offset21s>`
s_dcache_inv
@@ -1259,33 +1260,33 @@ SOPK
**INSTRUCTION** **DST** **SRC0** **SRC1**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_addk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
+ s_addk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
s_call_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_ea3f10>`, :ref:`label<amdgpu_synid_gfx10_label>`
- s_cmovk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_cmpk_eq_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_cmpk_eq_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_a04fb3>`
- s_cmpk_ge_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_cmpk_ge_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_a04fb3>`
- s_cmpk_gt_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_cmpk_gt_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_a04fb3>`
- s_cmpk_le_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_cmpk_le_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_a04fb3>`
- s_cmpk_lg_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_cmpk_lg_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_a04fb3>`
- s_cmpk_lt_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_cmpk_lt_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_a04fb3>`
+ s_cmovk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_cmpk_eq_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_cmpk_eq_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_169952>`
+ s_cmpk_ge_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_cmpk_ge_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_169952>`
+ s_cmpk_gt_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_cmpk_gt_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_169952>`
+ s_cmpk_le_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_cmpk_le_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_169952>`
+ s_cmpk_lg_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_cmpk_lg_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_169952>`
+ s_cmpk_lt_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_cmpk_lt_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_169952>`
s_getreg_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`hwreg<amdgpu_synid_gfx10_hwreg>`
- s_movk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_mulk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
+ s_movk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_mulk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
s_setreg_b32 :ref:`hwreg<amdgpu_synid_gfx10_hwreg>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`
s_setreg_imm32_b32 :ref:`hwreg<amdgpu_synid_gfx10_hwreg>`, :ref:`simm32<amdgpu_synid_gfx10_simm32_a3e80c>`
s_subvector_loop_begin :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`label<amdgpu_synid_gfx10_label>`
s_subvector_loop_end :ref:`sdst<amdgpu_synid_gfx10_sdst_8078f5>`, :ref:`label<amdgpu_synid_gfx10_label>`
- s_version :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_waitcnt_expcnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_waitcnt_lgkmcnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_waitcnt_vmcnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_waitcnt_vscnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
+ s_version :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_waitcnt_expcnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_waitcnt_lgkmcnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_waitcnt_vmcnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_waitcnt_vscnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_460c63>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
SOPP
----
@@ -1306,27 +1307,27 @@ SOPP
s_cbranch_scc1 :ref:`label<amdgpu_synid_gfx10_label>`
s_cbranch_vccnz :ref:`label<amdgpu_synid_gfx10_label>`
s_cbranch_vccz :ref:`label<amdgpu_synid_gfx10_label>`
- s_clause :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
+ s_clause :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
s_code_end
- s_decperflevel :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_denorm_mode :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
+ s_decperflevel :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_denorm_mode :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
s_endpgm
s_endpgm_ordered_ps_done
s_endpgm_saved
s_icache_inv
- s_incperflevel :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_inst_prefetch :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_nop :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_round_mode :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
+ s_incperflevel :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_inst_prefetch :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_nop :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_round_mode :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
s_sendmsg :ref:`msg<amdgpu_synid_gfx10_msg>`
s_sendmsghalt :ref:`msg<amdgpu_synid_gfx10_msg>`
- s_sethalt :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_setkill :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_setprio :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_sleep :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
- s_trap :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
+ s_sethalt :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_setkill :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_setprio :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_sleep :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
+ s_trap :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
s_ttracedata
- s_ttracedata_imm :ref:`imm16<amdgpu_synid_gfx10_imm16_73139a>`
+ s_ttracedata_imm :ref:`imm16<amdgpu_synid_gfx10_imm16_0533c2>`
s_wait_idle
s_waitcnt :ref:`waitcnt<amdgpu_synid_gfx10_waitcnt>`
s_waitcnt_depctr :ref:`waitcnt_depctr<amdgpu_synid_gfx10_waitcnt_depctr>`
@@ -1493,435 +1494,435 @@ VOP3
.. parsed-literal::
- **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_add3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_add_co_ci_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_3ec588>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_co_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_add_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_add_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_add_lshl_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_add_nc_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_nc_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_nc_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_nc_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_alignbit_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>`::ref:`b16<amdgpu_synid_gfx10_type_deviation>`
- v_alignbyte_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>`::ref:`b16<amdgpu_synid_gfx10_type_deviation>`
- v_and_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_and_or_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_c27036>`::ref:`u16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_ashrrev_i64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_bfe_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`
- v_bfe_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_bfi_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_bfm_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
- v_ceil_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ceil_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ceil_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ v_add3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_add_co_ci_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_3ec588>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_add_co_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_add_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add_lshl_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_add_nc_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_add_nc_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_add_nc_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_add_nc_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_alignbit_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>`::ref:`b16<amdgpu_synid_gfx10_type_deviation>`
+ v_alignbyte_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>`::ref:`b16<amdgpu_synid_gfx10_type_deviation>`
+ v_and_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_and_or_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_c27036>`::ref:`u16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_ashrrev_i64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_bfe_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`
+ v_bfe_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_bfi_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_bfm_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
+ v_ceil_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ceil_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ceil_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
v_clrexcp_e64
- v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
- v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
- v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
- v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_class_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
- v_cmpx_class_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
- v_cmpx_class_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
- v_cmpx_eq_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_eq_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_eq_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_eq_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_eq_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_eq_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_f_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_f_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_f_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_f_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_ge_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_ge_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_ge_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_ge_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_ge_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_ge_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_gt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_gt_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_gt_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_gt_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_gt_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_gt_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_le_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_le_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_le_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_le_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_le_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_le_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_lg_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lg_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lg_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_lt_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_lt_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_lt_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_lt_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_lt_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_ne_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_ne_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_ne_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_ne_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_cmpx_ne_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_ne_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_neq_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_neq_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_neq_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_t_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_t_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_t_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_cmpx_t_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_cmpx_tru_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_tru_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_tru_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_3ec588>`
- v_cos_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cos_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubeid_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubema_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubesc_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubetc_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_e9e6db>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_e9e6db>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`
- v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_norm_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_norm_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`
- v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`
- v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`
- v_cvt_pknorm_i16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`
- v_cvt_pknorm_u16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`
- v_cvt_pkrtz_f16_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`
- v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_fixup_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_fixup_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fixup_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fmas_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fmas_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_scale_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_div_scale_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`
- v_exp_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_exp_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
- v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
- v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
- v_floor_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_floor_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_floor_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fma_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fma_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fmac_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fmac_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fract_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fract_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fract_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`
- v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`
- v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`
- v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_interp_mov_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`param<amdgpu_synid_gfx10_param>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_interp_p1_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_interp_p1ll_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_interp_p1lv_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f16x2<amdgpu_synid_gfx10_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_interp_p2_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
- v_interp_p2_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ldexp_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ldexp_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_lerp_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
- v_log_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_log_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_lshl_add_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_lshl_or_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_c27036>`::ref:`u16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_lshlrev_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_c27036>`::ref:`u16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_lshrrev_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
- v_mac_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mac_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i32_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i32_i24 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i64_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_legacy_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u32_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u32_u24 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u64_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max3_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_max3_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_max3_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_max3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_max_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_max_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_max_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_max_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_med3_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_med3_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_med3_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_med3_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_med3_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_med3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_min3_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min3_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min3_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_min3_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_min3_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_min3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_min_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_min_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_min_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_min_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_mov_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
- v_movreld_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
- v_movrels_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`
- v_movrelsd_2_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`
- v_movrelsd_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`
- v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u8x8<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_69a144>`::ref:`u32x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u8x8<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc_e016a1>`::ref:`u32x4<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_msad_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_hi_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_mul_hi_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
- v_mul_lo_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mullit_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
+ v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
+ v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
+ v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_class_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
+ v_cmpx_class_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
+ v_cmpx_class_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
+ v_cmpx_eq_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_eq_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_eq_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_eq_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_eq_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_eq_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_eq_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_eq_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_eq_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_f_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_f_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_f_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_f_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_f_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_f_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_f_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_ge_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ge_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ge_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ge_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_ge_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_ge_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_ge_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_ge_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_ge_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_gt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_gt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_gt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_gt_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_gt_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_gt_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_gt_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_gt_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_gt_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_le_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_le_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_le_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_le_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_le_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_le_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_le_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_le_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_le_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_lg_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lg_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lg_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_lt_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_lt_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_lt_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_lt_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_lt_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_ne_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_ne_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_ne_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_ne_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_cmpx_ne_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_ne_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_neq_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_neq_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_neq_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nge_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nge_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nge_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ngt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ngt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ngt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nle_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nle_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nle_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlg_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlg_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlg_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_o_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_o_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_o_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_t_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_t_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_t_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_cmpx_t_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_cmpx_tru_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_tru_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_tru_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_u_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_u_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_u_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_3ec588>`
+ v_cos_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cos_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubeid_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubema_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubesc_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubetc_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_e9e6db>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_e9e6db>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`
+ v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_norm_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_norm_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`
+ v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`
+ v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`
+ v_cvt_pknorm_i16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`
+ v_cvt_pknorm_u16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`
+ v_cvt_pkrtz_f16_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`
+ v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_div_fixup_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fixup_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fixup_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fmas_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fmas_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_scale_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_div_scale_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`
+ v_exp_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_exp_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
+ v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
+ v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
+ v_floor_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_floor_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_floor_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fma_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fma_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fma_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fmac_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fmac_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fract_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fract_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fract_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`
+ v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`
+ v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`
+ v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_interp_mov_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`param<amdgpu_synid_gfx10_param>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_interp_p1_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_interp_p1ll_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_interp_p1lv_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f16x2<amdgpu_synid_gfx10_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_interp_p2_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_interp_p2_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ldexp_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ldexp_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_lerp_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`
+ v_log_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_log_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_lshl_add_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_lshl_or_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_c27036>`::ref:`u16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_lshlrev_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_c27036>`::ref:`u16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_lshrrev_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`
+ v_mac_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mac_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_i32_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_i32_i24 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_i64_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_legacy_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_u32_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_u32_u24 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_u64_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_max3_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max3_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max3_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_max3_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_max3_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_max3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_max_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_max_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_max_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_max_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_med3_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_med3_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_med3_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_med3_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_med3_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_med3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_min3_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min3_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min3_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_min3_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_min3_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_min3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_min_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_min_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_min_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_min_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_mov_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
+ v_movreld_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
+ v_movrels_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`
+ v_movrelsd_2_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`
+ v_movrelsd_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc_6802ce>`
+ v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u8x8<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_69a144>`::ref:`u32x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u8x8<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc_e016a1>`::ref:`u32x4<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_msad_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mul_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_hi_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_mul_hi_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>`
+ v_mul_lo_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mullit_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
v_nop_e64
- v_not_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
- v_or3_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_or_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_pack_b32_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_perm_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_permlane16_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_9a4448>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_9a4448>` :ref:`dpp_op_sel<amdgpu_synid_dpp_op_sel>`
- v_permlanex16_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_9a4448>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_9a4448>` :ref:`dpp_op_sel<amdgpu_synid_dpp_op_sel>`
+ v_not_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
+ v_or3_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_or_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_pack_b32_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_perm_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_permlane16_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_bb715c>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_bb715c>` :ref:`dpp_op_sel<amdgpu_synid_dpp_op_sel>`
+ v_permlanex16_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_6802ce>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_bb715c>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_bb715c>` :ref:`dpp_op_sel<amdgpu_synid_dpp_op_sel>`
v_pipeflush_e64
- v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u8x8<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rcp_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rcp_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rcp_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_readlane_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_2e4c2a>`, :ref:`src0<amdgpu_synid_gfx10_src_516946>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_48e8e7>`
- v_rndne_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rndne_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rndne_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rsq_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rsq_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rsq_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sad_hi_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`u16x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u16x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sat_pk_u8_i16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
- v_sin_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sin_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sub_co_ci_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_3ec588>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_co_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sub_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sub_nc_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_nc_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_nc_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_nc_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_co_ci_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_3ec588>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_co_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_subrev_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_subrev_nc_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
- v_trig_preop_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_trunc_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_trunc_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_trunc_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_writelane_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_054e2a>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_48e8e7>`
- v_xad_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_xnor_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
- v_xor3_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
- v_xor_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u8x8<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_d5cd94>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_rcp_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rcp_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rcp_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_readlane_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_2e4c2a>`, :ref:`src0<amdgpu_synid_gfx10_src_516946>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_48e8e7>`
+ v_rndne_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rndne_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rndne_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rsq_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rsq_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rsq_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sad_hi_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sad_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`u16x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u16x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sad_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sad_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sat_pk_u8_i16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`
+ v_sin_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sin_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sub_co_ci_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_3ec588>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sub_co_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sub_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sub_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sub_nc_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sub_nc_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sub_nc_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sub_nc_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subrev_co_ci_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_3ec588>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subrev_co_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx10_sdst_3759f6>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subrev_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_subrev_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_subrev_nc_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_trig_preop_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_trunc_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_trunc_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_trunc_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx10_src_d5cd94>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_writelane_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_054e2a>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_48e8e7>`
+ v_xad_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_xnor_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
+ v_xor3_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`
+ v_xor_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`
VOP3P
-----
@@ -1930,9 +1931,9 @@ VOP3P
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_f5d306>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src2<amdgpu_synid_gfx10_src_cf1cda>`::ref:`m<amdgpu_synid_gfx10_m_c141fc>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
v_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_823582>`, :ref:`src1<amdgpu_synid_gfx10_src_cf1cda>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
v_pk_add_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
v_pk_add_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx10_src_e9e6db>`, :ref:`src1<amdgpu_synid_gfx10_src_c27036>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
@@ -2160,11 +2161,11 @@ VOPC
gfx10_dst
gfx10_fx_operand
gfx10_hwreg
- gfx10_imm16_73139a
- gfx10_imm16_a04fb3
+ gfx10_imm16_0533c2
+ gfx10_imm16_169952
gfx10_label
- gfx10_m_254bcb
- gfx10_m_f5d306
+ gfx10_m_28b494
+ gfx10_m_c141fc
gfx10_msg
gfx10_opt_0d447d
gfx10_opt_847aed
@@ -2172,15 +2173,15 @@ VOPC
gfx10_probe
gfx10_saddr_beaa25
gfx10_saddr_da2a8a
- gfx10_sbase_010ce0
gfx10_sbase_020892
+ gfx10_sbase_b0aa25
gfx10_sbase_b2d796
- gfx10_sdata_3d2ab7
+ gfx10_sdata_5e9fb5
gfx10_sdata_6fbc49
gfx10_sdata_7cbd60
- gfx10_sdata_7e874d
gfx10_sdata_81ba27
- gfx10_sdata_c6aec1
+ gfx10_sdata_90678d
+ gfx10_sdata_c1aec6
gfx10_sdst_0804b1
gfx10_sdst_2e4c2a
gfx10_sdst_362c37
@@ -2193,9 +2194,9 @@ VOPC
gfx10_simm32_6f0844
gfx10_simm32_a3e80c
gfx10_simm32_be0c1c
+ gfx10_soffset_0f304c
gfx10_soffset_73dae7
gfx10_soffset_b556e6
- gfx10_soffset_d01a5c
gfx10_src_37d670
gfx10_src_516946
gfx10_src_823582
@@ -2204,8 +2205,8 @@ VOPC
gfx10_src_d5cd94
gfx10_src_e0345d
gfx10_src_e9e6db
+ gfx10_srsrc_80eef6
gfx10_srsrc_cf7132
- gfx10_srsrc_e73d16
gfx10_ssamp
gfx10_ssrc_054e2a
gfx10_ssrc_2a042f
@@ -2215,48 +2216,52 @@ VOPC
gfx10_ssrc_6fbc49
gfx10_ssrc_7da351
gfx10_ssrc_81ba27
- gfx10_ssrc_9a4448
+ gfx10_ssrc_bb715c
gfx10_tgt
gfx10_type_deviation
gfx10_vaddr_76b997
gfx10_vaddr_9aeece
gfx10_vaddr_9f7133
+ gfx10_vaddr_a5639c
gfx10_vaddr_b73dc0
- gfx10_vaddr_cdc744
gfx10_vaddr_f20ee4
gfx10_vcc
gfx10_vdata0_6802ce
gfx10_vdata0_fd235e
gfx10_vdata1_6802ce
gfx10_vdata1_fd235e
- gfx10_vdata_0aba12
- gfx10_vdata_15d255
- gfx10_vdata_16d321
- gfx10_vdata_35851e
+ gfx10_vdata_21b58d
+ gfx10_vdata_2d6239
+ gfx10_vdata_4b260e
gfx10_vdata_56f215
gfx10_vdata_6802ce
- gfx10_vdata_890652
- gfx10_vdata_a9ff5a
+ gfx10_vdata_84fab6
+ gfx10_vdata_aa5a53
+ gfx10_vdata_ad559c
gfx10_vdata_c08393
gfx10_vdata_e016a1
gfx10_vdata_fd235e
- gfx10_vdst_2ea017
- gfx10_vdst_322561
- gfx10_vdst_3d7dcf
gfx10_vdst_463513
- gfx10_vdst_473a69
gfx10_vdst_48e42f
gfx10_vdst_4d2300
+ gfx10_vdst_5d50a1
+ gfx10_vdst_5ec176
gfx10_vdst_69a144
gfx10_vdst_709347
gfx10_vdst_81a6ed
+ gfx10_vdst_875645
gfx10_vdst_89680f
+ gfx10_vdst_a49b76
gfx10_vdst_bdb32f
gfx10_vdst_d0dc43
gfx10_vdst_d71f1c
+ gfx10_vdst_d7c57e
gfx10_vdst_dd8a32
- gfx10_vsrc_533a4e
+ gfx10_vdst_dfa6da
+ gfx10_vdst_eae4c8
+ gfx10_vdst_f47754
gfx10_vsrc_6802ce
+ gfx10_vsrc_ba3116
gfx10_vsrc_e016a1
gfx10_vsrc_fd235e
gfx10_waitcnt
diff --git a/llvm/docs/AMDGPU/gfx10_fx_operand.rst b/llvm/docs/AMDGPU/gfx10_fx_operand.rst
index 1f83eb2423be6..ed98d9b1c11aa 100644
--- a/llvm/docs/AMDGPU/gfx10_fx_operand.rst
+++ b/llvm/docs/AMDGPU/gfx10_fx_operand.rst
@@ -10,7 +10,7 @@
FX Operand
==========
-This is an *f32* or *f16* operand depending on instruction modifiers:
+This is a *f32* or *f16* operand depending on instruction modifiers:
* Operand size is controlled by :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>`.
-* Location of 16-bit operand is controlled by :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>`.
+* Location of the 16-bit operand is controlled by :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>`.
diff --git a/llvm/docs/AMDGPU/gfx10_hwreg.rst b/llvm/docs/AMDGPU/gfx10_hwreg.rst
index ccfa97d53c3e0..dc587ed36c7fb 100644
--- a/llvm/docs/AMDGPU/gfx10_hwreg.rst
+++ b/llvm/docs/AMDGPU/gfx10_hwreg.rst
@@ -24,27 +24,27 @@ The bits of this operand have the following meaning:
This operand may be specified as one of the following:
-* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
-* An *hwreg* value described below.
+* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from 0 to 0xFFFF.
+* An *hwreg* value which is described below.
- ==================================== ============================================================================
+ ==================================== ===============================================================================
Hwreg Value Syntax Description
- ==================================== ============================================================================
- hwreg({0..63}) All bits of a register indicated by its *id*.
- hwreg(<*name*>) All bits of a register indicated by its *name*.
- hwreg({0..63}, {0..31}, {1..32}) Register bits indicated by register *id*, first bit *offset* and *size*.
- hwreg(<*name*>, {0..31}, {1..32}) Register bits indicated by register *name*, first bit *offset* and *size*.
- ==================================== ============================================================================
+ ==================================== ===============================================================================
+ hwreg({0..63}) All bits of a register indicated by the register *id*.
+ hwreg(<*name*>) All bits of a register indicated by the register *name*.
+ hwreg({0..63}, {0..31}, {1..32}) Register bits indicated by the register *id*, first bit *offset* and *size*.
+ hwreg(<*name*>, {0..31}, {1..32}) Register bits indicated by the register *name*, first bit *offset* and *size*.
+ ==================================== ===============================================================================
Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
or :ref:`absolute expressions<amdgpu_synid_absolute_expression>`.
-Defined register *names* include:
+Predefined register *names* include:
============================== ==========================================
Name Description
============================== ==========================================
- HW_REG_MODE Shader writeable mode bits.
+ HW_REG_MODE Shader writable mode bits.
HW_REG_STATUS Shader read-only status.
HW_REG_TRAPSTS Trap status.
HW_REG_HW_ID1 Id of wave, simd, compute unit, etc.
diff --git a/llvm/docs/AMDGPU/gfx10_imm16_a04fb3.rst b/llvm/docs/AMDGPU/gfx10_imm16_0533c2.rst
similarity index 83%
rename from llvm/docs/AMDGPU/gfx10_imm16_a04fb3.rst
rename to llvm/docs/AMDGPU/gfx10_imm16_0533c2.rst
index 083654bf5431e..1b9d82cfd34e0 100644
--- a/llvm/docs/AMDGPU/gfx10_imm16_a04fb3.rst
+++ b/llvm/docs/AMDGPU/gfx10_imm16_0533c2.rst
@@ -5,9 +5,9 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_imm16_a04fb3:
+.. _amdgpu_synid_gfx10_imm16_0533c2:
imm16
=====
-An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..65535.
+An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from -32768 to 65535.
diff --git a/llvm/docs/AMDGPU/gfx10_imm16_73139a.rst b/llvm/docs/AMDGPU/gfx10_imm16_169952.rst
similarity index 84%
rename from llvm/docs/AMDGPU/gfx10_imm16_73139a.rst
rename to llvm/docs/AMDGPU/gfx10_imm16_169952.rst
index 085b8c7a5742f..0a34ab4041547 100644
--- a/llvm/docs/AMDGPU/gfx10_imm16_73139a.rst
+++ b/llvm/docs/AMDGPU/gfx10_imm16_169952.rst
@@ -5,9 +5,9 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_imm16_73139a:
+.. _amdgpu_synid_gfx10_imm16_169952:
imm16
=====
-An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
+An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from 0 to 65535.
diff --git a/llvm/docs/AMDGPU/gfx10_label.rst b/llvm/docs/AMDGPU/gfx10_label.rst
index f5dddfd4036dc..3a3bba9b7f0c0 100644
--- a/llvm/docs/AMDGPU/gfx10_label.rst
+++ b/llvm/docs/AMDGPU/gfx10_label.rst
@@ -10,11 +10,11 @@
label
=====
-A branch target which is a 16-bit signed integer treated as a PC-relative dword offset.
+A branch target, which is a 16-bit signed integer treated as a PC-relative dword offset.
This operand may be specified as one of the following:
-* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
+* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from -32768 to 65535.
* A :ref:`symbol<amdgpu_synid_symbol>` (for example, a label) representing a relocatable address in the same compilation unit where it is referred from. The value is handled as a 16-bit PC-relative dword offset to be resolved by a linker.
Examples:
diff --git a/llvm/docs/AMDGPU/gfx10_m_254bcb.rst b/llvm/docs/AMDGPU/gfx10_m_28b494.rst
similarity index 69%
rename from llvm/docs/AMDGPU/gfx10_m_254bcb.rst
rename to llvm/docs/AMDGPU/gfx10_m_28b494.rst
index 134854f0e8c3a..4e917ea3f521c 100644
--- a/llvm/docs/AMDGPU/gfx10_m_254bcb.rst
+++ b/llvm/docs/AMDGPU/gfx10_m_28b494.rst
@@ -5,9 +5,9 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_m_254bcb:
+.. _amdgpu_synid_gfx10_m_28b494:
m
=
-This operand may be used with integer operand modifier :ref:`sext<amdgpu_synid_sext>`.
+This operand may be used with an integer operand modifier :ref:`sext<amdgpu_synid_sext>`.
diff --git a/llvm/docs/AMDGPU/gfx10_m_f5d306.rst b/llvm/docs/AMDGPU/gfx10_m_c141fc.rst
similarity index 78%
rename from llvm/docs/AMDGPU/gfx10_m_f5d306.rst
rename to llvm/docs/AMDGPU/gfx10_m_c141fc.rst
index bfef084373c70..e1f4b490656a8 100644
--- a/llvm/docs/AMDGPU/gfx10_m_f5d306.rst
+++ b/llvm/docs/AMDGPU/gfx10_m_c141fc.rst
@@ -5,9 +5,9 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_m_f5d306:
+.. _amdgpu_synid_gfx10_m_c141fc:
m
=
-This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.
+This operand may be used with floating-point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.
diff --git a/llvm/docs/AMDGPU/gfx10_msg.rst b/llvm/docs/AMDGPU/gfx10_msg.rst
index d72f53580b2f8..83ef29e646f1e 100644
--- a/llvm/docs/AMDGPU/gfx10_msg.rst
+++ b/llvm/docs/AMDGPU/gfx10_msg.rst
@@ -24,8 +24,8 @@ A 16-bit message code. The bits of this operand have the following meaning:
This operand may be specified as one of the following:
-* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
-* A *sendmsg* value described below.
+* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from 0 to 0xFFFF.
+* A *sendmsg* value which is described below.
==================================== ====================================================
Sendmsg Value Syntax Description
@@ -40,7 +40,7 @@ This operand may be specified as one of the following:
*Op* may be specified using operation *name* or operation *id*.
-Stream *id* is an integer in the range 0..3.
+Stream *id* is an integer in the range from 0 to 3.
Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
or :ref:`absolute expressions<amdgpu_synid_absolute_expression>`.
@@ -73,7 +73,7 @@ Each message type supports specific operations:
*Sendmsg* arguments are validated depending on how *type* value is specified:
* If message *type* is specified by name, arguments values must satisfy limitations detailed in the table above.
-* If message *type* is specified as a number, each argument must not exceed corresponding value range (see the first table).
+* If message *type* is specified as a number, each argument must not exceed the corresponding value range (see the first table).
Examples:
diff --git a/llvm/docs/AMDGPU/gfx10_sbase_010ce0.rst b/llvm/docs/AMDGPU/gfx10_sbase_b0aa25.rst
similarity index 83%
rename from llvm/docs/AMDGPU/gfx10_sbase_010ce0.rst
rename to llvm/docs/AMDGPU/gfx10_sbase_b0aa25.rst
index 3d3f6cee89edb..2d8321c40ffa9 100644
--- a/llvm/docs/AMDGPU/gfx10_sbase_010ce0.rst
+++ b/llvm/docs/AMDGPU/gfx10_sbase_b0aa25.rst
@@ -5,12 +5,12 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_sbase_010ce0:
+.. _amdgpu_synid_gfx10_sbase_b0aa25:
sbase
=====
-A 128-bit buffer resource constant for scalar memory operations which provides a base address, a size and a stride.
+A 128-bit buffer resource constant for scalar memory operations which provides a base address, a size, and a stride.
*Size:* 4 dwords.
diff --git a/llvm/docs/AMDGPU/gfx10_sdata_3d2ab7.rst b/llvm/docs/AMDGPU/gfx10_sdata_5e9fb5.rst
similarity index 85%
rename from llvm/docs/AMDGPU/gfx10_sdata_3d2ab7.rst
rename to llvm/docs/AMDGPU/gfx10_sdata_5e9fb5.rst
index d43311a682153..ecf57e7f96de3 100644
--- a/llvm/docs/AMDGPU/gfx10_sdata_3d2ab7.rst
+++ b/llvm/docs/AMDGPU/gfx10_sdata_5e9fb5.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_sdata_3d2ab7:
+.. _amdgpu_synid_gfx10_sdata_5e9fb5:
sdata
=====
Input data for an atomic instruction.
-Optionally may serve as an output data:
+Optionally, this operand may be used to store output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
diff --git a/llvm/docs/AMDGPU/gfx10_sdata_7e874d.rst b/llvm/docs/AMDGPU/gfx10_sdata_90678d.rst
similarity index 85%
rename from llvm/docs/AMDGPU/gfx10_sdata_7e874d.rst
rename to llvm/docs/AMDGPU/gfx10_sdata_90678d.rst
index 873e40c82a458..219969a326134 100644
--- a/llvm/docs/AMDGPU/gfx10_sdata_7e874d.rst
+++ b/llvm/docs/AMDGPU/gfx10_sdata_90678d.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_sdata_7e874d:
+.. _amdgpu_synid_gfx10_sdata_90678d:
sdata
=====
Input data for an atomic instruction.
-Optionally may serve as an output data:
+Optionally, this operand may be used to store output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
diff --git a/llvm/docs/AMDGPU/gfx10_sdata_c6aec1.rst b/llvm/docs/AMDGPU/gfx10_sdata_c1aec6.rst
similarity index 84%
rename from llvm/docs/AMDGPU/gfx10_sdata_c6aec1.rst
rename to llvm/docs/AMDGPU/gfx10_sdata_c1aec6.rst
index 70a8b62f12648..82cdc188d2448 100644
--- a/llvm/docs/AMDGPU/gfx10_sdata_c6aec1.rst
+++ b/llvm/docs/AMDGPU/gfx10_sdata_c1aec6.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_sdata_c6aec1:
+.. _amdgpu_synid_gfx10_sdata_c1aec6:
sdata
=====
Input data for an atomic instruction.
-Optionally may serve as an output data:
+Optionally, this operand may be used to store output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
diff --git a/llvm/docs/AMDGPU/gfx10_soffset_d01a5c.rst b/llvm/docs/AMDGPU/gfx10_soffset_0f304c.rst
similarity index 82%
rename from llvm/docs/AMDGPU/gfx10_soffset_d01a5c.rst
rename to llvm/docs/AMDGPU/gfx10_soffset_0f304c.rst
index 22ae3132cd51e..b8ef2c174cde1 100644
--- a/llvm/docs/AMDGPU/gfx10_soffset_d01a5c.rst
+++ b/llvm/docs/AMDGPU/gfx10_soffset_0f304c.rst
@@ -5,12 +5,12 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_soffset_d01a5c:
+.. _amdgpu_synid_gfx10_soffset_0f304c:
soffset
=======
-An unsigned offset from the base address. My be specified as either a register or a 20-bit immediate.
+An unsigned offset from the base address. May be specified as either a register or a 20-bit immediate.
Note that an *immediate* offset may be specified using either :ref:`uimm20<amdgpu_synid_uimm20>` operand or :ref:`offset20u<amdgpu_synid_smem_offset20u>` modifier, but not both.
diff --git a/llvm/docs/AMDGPU/gfx10_srsrc_e73d16.rst b/llvm/docs/AMDGPU/gfx10_srsrc_80eef6.rst
similarity index 74%
rename from llvm/docs/AMDGPU/gfx10_srsrc_e73d16.rst
rename to llvm/docs/AMDGPU/gfx10_srsrc_80eef6.rst
index 824713d224448..860b4bd8cecb4 100644
--- a/llvm/docs/AMDGPU/gfx10_srsrc_e73d16.rst
+++ b/llvm/docs/AMDGPU/gfx10_srsrc_80eef6.rst
@@ -5,12 +5,12 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_srsrc_e73d16:
+.. _amdgpu_synid_gfx10_srsrc_80eef6:
srsrc
=====
-Buffer resource constant which defines the address and characteristics of the buffer in memory.
+Buffer resource constant, which defines the address and characteristics of the buffer in memory.
*Size:* 4 dwords.
diff --git a/llvm/docs/AMDGPU/gfx10_ssrc_9a4448.rst b/llvm/docs/AMDGPU/gfx10_ssrc_bb715c.rst
similarity index 83%
rename from llvm/docs/AMDGPU/gfx10_ssrc_9a4448.rst
rename to llvm/docs/AMDGPU/gfx10_ssrc_bb715c.rst
index fb5b471e2d61b..c6ef0c34605e4 100644
--- a/llvm/docs/AMDGPU/gfx10_ssrc_9a4448.rst
+++ b/llvm/docs/AMDGPU/gfx10_ssrc_bb715c.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_ssrc_9a4448:
+.. _amdgpu_synid_gfx10_ssrc_bb715c:
ssrc
====
@@ -14,4 +14,4 @@ Instruction input.
*Size:* 1 dword.
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
diff --git a/llvm/docs/AMDGPU/gfx10_tgt.rst b/llvm/docs/AMDGPU/gfx10_tgt.rst
index a8762c493f1c5..7b03d95ba7f94 100644
--- a/llvm/docs/AMDGPU/gfx10_tgt.rst
+++ b/llvm/docs/AMDGPU/gfx10_tgt.rst
@@ -22,3 +22,10 @@ An export target:
prim Copy primitive (connectivity) data.
null Copy nothing.
================== ===================================
+
+Examples:
+
+.. parsed-literal::
+
+ exp pos3 v1, v2, v3, v4
+ exp mrt0 v1, v2, v3, v4
diff --git a/llvm/docs/AMDGPU/gfx10_type_deviation.rst b/llvm/docs/AMDGPU/gfx10_type_deviation.rst
index e0e417deb3afa..9add1796a8838 100644
--- a/llvm/docs/AMDGPU/gfx10_type_deviation.rst
+++ b/llvm/docs/AMDGPU/gfx10_type_deviation.rst
@@ -10,4 +10,4 @@
Type Deviation
==============
-*Type* of this operand
diff ers from *type* :ref:`implied by the opcode<amdgpu_syn_instruction_mnemo>`. This tag specifies actual operand *type*.
+The *type* of this operand
diff ers from the *type* :ref:`implied by the opcode<amdgpu_syn_instruction_mnemo>`. This tag specifies the actual operand *type*.
diff --git a/llvm/docs/AMDGPU/gfx10_vaddr_cdc744.rst b/llvm/docs/AMDGPU/gfx10_vaddr_a5639c.rst
similarity index 55%
rename from llvm/docs/AMDGPU/gfx10_vaddr_cdc744.rst
rename to llvm/docs/AMDGPU/gfx10_vaddr_a5639c.rst
index 1ae91d8e32d5b..ef57e0b041e48 100644
--- a/llvm/docs/AMDGPU/gfx10_vaddr_cdc744.rst
+++ b/llvm/docs/AMDGPU/gfx10_vaddr_a5639c.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vaddr_cdc744:
+.. _amdgpu_synid_gfx10_vaddr_a5639c:
vaddr
=====
@@ -14,9 +14,6 @@ Image address which includes from one to four dimensional coordinates and other
This operand may be specified using either :ref:`standard VGPR syntax<amdgpu_synid_v>` or special :ref:`NSA VGPR syntax<amdgpu_synid_nsa>`.
-*Size:* 1-13 dwords. Actual size depends on syntax, opcode, :ref:`dim<amdgpu_synid_dim>` and :ref:`a16<amdgpu_synid_a16>`.
-
-* If specified using :ref:`NSA VGPR syntax<amdgpu_synid_nsa>`, the size is 1-13 dwords.
-* If specified using :ref:`standard VGPR syntax<amdgpu_synid_v>`, the size is 1-8 dwords. Opcodes which require more than 8 dwords for address size must specify 16 dwords due to a limited range of supported register sequences.
+*Size:* 1-12 dwords. Actual size depends on opcode, :ref:`dim<amdgpu_synid_dim>` and :ref:`a16<amdgpu_synid_a16>`.
*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx10_vdata_15d255.rst b/llvm/docs/AMDGPU/gfx10_vdata_21b58d.rst
similarity index 81%
rename from llvm/docs/AMDGPU/gfx10_vdata_15d255.rst
rename to llvm/docs/AMDGPU/gfx10_vdata_21b58d.rst
index c925debf162d4..e714cf197a363 100644
--- a/llvm/docs/AMDGPU/gfx10_vdata_15d255.rst
+++ b/llvm/docs/AMDGPU/gfx10_vdata_21b58d.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vdata_15d255:
+.. _amdgpu_synid_gfx10_vdata_21b58d:
vdata
=====
@@ -14,7 +14,7 @@ Image data to store by an *image_store* instruction.
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`d16<amdgpu_synid_d16>`:
-* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
+* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits, depending on :ref:`d16<amdgpu_synid_d16>`.
* :ref:`d16<amdgpu_synid_d16>` specifies that data in registers are packed; each value occupies 16 bits.
*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx10_vdata_890652.rst b/llvm/docs/AMDGPU/gfx10_vdata_2d6239.rst
similarity index 83%
rename from llvm/docs/AMDGPU/gfx10_vdata_890652.rst
rename to llvm/docs/AMDGPU/gfx10_vdata_2d6239.rst
index 2e461e3ed575d..6cda488ed2a4e 100644
--- a/llvm/docs/AMDGPU/gfx10_vdata_890652.rst
+++ b/llvm/docs/AMDGPU/gfx10_vdata_2d6239.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vdata_890652:
+.. _amdgpu_synid_gfx10_vdata_2d6239:
vdata
=====
Input data for an atomic instruction.
-Optionally may serve as an output data:
+Optionally, this operand may be used to store output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
diff --git a/llvm/docs/AMDGPU/gfx10_vdata_16d321.rst b/llvm/docs/AMDGPU/gfx10_vdata_4b260e.rst
similarity index 83%
rename from llvm/docs/AMDGPU/gfx10_vdata_16d321.rst
rename to llvm/docs/AMDGPU/gfx10_vdata_4b260e.rst
index c000946b93d6d..3a85dd0e9c9ee 100644
--- a/llvm/docs/AMDGPU/gfx10_vdata_16d321.rst
+++ b/llvm/docs/AMDGPU/gfx10_vdata_4b260e.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vdata_16d321:
+.. _amdgpu_synid_gfx10_vdata_4b260e:
vdata
=====
Input data for an atomic instruction.
-Optionally may serve as an output data:
+Optionally, this operand may be used to store output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
diff --git a/llvm/docs/AMDGPU/gfx10_vdata_a9ff5a.rst b/llvm/docs/AMDGPU/gfx10_vdata_84fab6.rst
similarity index 84%
rename from llvm/docs/AMDGPU/gfx10_vdata_a9ff5a.rst
rename to llvm/docs/AMDGPU/gfx10_vdata_84fab6.rst
index 4c9b42728404a..6b173446f015c 100644
--- a/llvm/docs/AMDGPU/gfx10_vdata_a9ff5a.rst
+++ b/llvm/docs/AMDGPU/gfx10_vdata_84fab6.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vdata_a9ff5a:
+.. _amdgpu_synid_gfx10_vdata_84fab6:
vdata
=====
Input data for an atomic instruction.
-Optionally may serve as an output data:
+Optionally, this operand may be used to store output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
@@ -21,6 +21,6 @@ Optionally may serve as an output data:
* :ref:`dmask<amdgpu_synid_dmask>` may specify 2 data elements for 32-bit-per-pixel surfaces or 4 data elements for 64-bit-per-pixel surfaces. Each data element occupies 1 dword.
- Note: the surface data format is indicated in the image resource constant but not in the instruction.
+ Note: the surface data format is indicated in the image resource constant, but not in the instruction.
*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx10_vdata_35851e.rst b/llvm/docs/AMDGPU/gfx10_vdata_aa5a53.rst
similarity index 84%
rename from llvm/docs/AMDGPU/gfx10_vdata_35851e.rst
rename to llvm/docs/AMDGPU/gfx10_vdata_aa5a53.rst
index 53036f75fdc89..fcaafb17dcfb6 100644
--- a/llvm/docs/AMDGPU/gfx10_vdata_35851e.rst
+++ b/llvm/docs/AMDGPU/gfx10_vdata_aa5a53.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vdata_35851e:
+.. _amdgpu_synid_gfx10_vdata_aa5a53:
vdata
=====
Input data for an atomic instruction.
-Optionally may serve as an output data:
+Optionally, this operand may be used to store output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
@@ -21,6 +21,6 @@ Optionally may serve as an output data:
* :ref:`dmask<amdgpu_synid_dmask>` may specify 1 data element for 32-bit-per-pixel surfaces or 2 data elements for 64-bit-per-pixel surfaces. Each data element occupies 1 dword.
- Note: the surface data format is indicated in the image resource constant but not in the instruction.
+ Note: the surface data format is indicated in the image resource constant, but not in the instruction.
*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx10_vdata_0aba12.rst b/llvm/docs/AMDGPU/gfx10_vdata_ad559c.rst
similarity index 83%
rename from llvm/docs/AMDGPU/gfx10_vdata_0aba12.rst
rename to llvm/docs/AMDGPU/gfx10_vdata_ad559c.rst
index 8427034c4c888..86f208bf71047 100644
--- a/llvm/docs/AMDGPU/gfx10_vdata_0aba12.rst
+++ b/llvm/docs/AMDGPU/gfx10_vdata_ad559c.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vdata_0aba12:
+.. _amdgpu_synid_gfx10_vdata_ad559c:
vdata
=====
Input data for an atomic instruction.
-Optionally may serve as an output data:
+Optionally, this operand may be used to store output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
diff --git a/llvm/docs/AMDGPU/gfx10_vdst_322561.rst b/llvm/docs/AMDGPU/gfx10_vdst_5d50a1.rst
similarity index 71%
rename from llvm/docs/AMDGPU/gfx10_vdst_322561.rst
rename to llvm/docs/AMDGPU/gfx10_vdst_5d50a1.rst
index 2af4a115c4c19..c24a7b0e37387 100644
--- a/llvm/docs/AMDGPU/gfx10_vdst_322561.rst
+++ b/llvm/docs/AMDGPU/gfx10_vdst_5d50a1.rst
@@ -5,15 +5,13 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vdst_322561:
+.. _amdgpu_synid_gfx10_vdst_5d50a1:
vdst
====
Instruction output: data read from a memory buffer.
-This is an optional operand. It must be used if and only if :ref:`lds<amdgpu_synid_lds>` is omitted.
-
-*Size:* 1 dword.
+*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx10_vdst_2ea017.rst b/llvm/docs/AMDGPU/gfx10_vdst_5ec176.rst
similarity index 77%
rename from llvm/docs/AMDGPU/gfx10_vdst_2ea017.rst
rename to llvm/docs/AMDGPU/gfx10_vdst_5ec176.rst
index 178accdfda15d..be5a0cf7f4e2a 100644
--- a/llvm/docs/AMDGPU/gfx10_vdst_2ea017.rst
+++ b/llvm/docs/AMDGPU/gfx10_vdst_5ec176.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vdst_2ea017:
+.. _amdgpu_synid_gfx10_vdst_5ec176:
vdst
====
-Image data to load by an *image_gather4* instruction.
+Image data to be loaded by an *image_gather4* instruction.
-*Size:* 4 data elements by default. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
+*Size:* 4 data elements by default. Each data element occupies either 32 bits or 16 bits, depending on :ref:`d16<amdgpu_synid_d16>`.
:ref:`d16<amdgpu_synid_d16>` affects operand size as follows:
diff --git a/llvm/docs/AMDGPU/gfx10_vdst_875645.rst b/llvm/docs/AMDGPU/gfx10_vdst_875645.rst
new file mode 100644
index 0000000000000..0376111dc16cc
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx10_vdst_875645.rst
@@ -0,0 +1,21 @@
+..
+ **************************************************
+ * *
+ * Automatically generated file, do not edit! *
+ * *
+ **************************************************
+
+.. _amdgpu_synid_gfx10_vdst_875645:
+
+vdst
+====
+
+Instruction output: data read from a memory buffer.
+
+This is an optional operand. It must be used if and only if :ref:`lds<amdgpu_synid_lds>` is omitted.
+
+*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+
+ Note that :ref:`tfe<amdgpu_synid_tfe>` and :ref:`lds<amdgpu_synid_lds>` cannot be used together.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx10_vdst_a49b76.rst b/llvm/docs/AMDGPU/gfx10_vdst_a49b76.rst
new file mode 100644
index 0000000000000..1a5d7028d4838
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx10_vdst_a49b76.rst
@@ -0,0 +1,17 @@
+..
+ **************************************************
+ * *
+ * Automatically generated file, do not edit! *
+ * *
+ **************************************************
+
+.. _amdgpu_synid_gfx10_vdst_a49b76:
+
+vdst
+====
+
+Instruction output: data read from a memory buffer.
+
+*Size:* 3 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx10_vdst_d7c57e.rst b/llvm/docs/AMDGPU/gfx10_vdst_d7c57e.rst
new file mode 100644
index 0000000000000..3cecfb2000cf6
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx10_vdst_d7c57e.rst
@@ -0,0 +1,17 @@
+..
+ **************************************************
+ * *
+ * Automatically generated file, do not edit! *
+ * *
+ **************************************************
+
+.. _amdgpu_synid_gfx10_vdst_d7c57e:
+
+vdst
+====
+
+Instruction output: data read from a memory buffer.
+
+*Size:* 2 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx10_vdst_3d7dcf.rst b/llvm/docs/AMDGPU/gfx10_vdst_dfa6da.rst
similarity index 87%
rename from llvm/docs/AMDGPU/gfx10_vdst_3d7dcf.rst
rename to llvm/docs/AMDGPU/gfx10_vdst_dfa6da.rst
index d41833cc65558..7c0e62f9d6e65 100644
--- a/llvm/docs/AMDGPU/gfx10_vdst_3d7dcf.rst
+++ b/llvm/docs/AMDGPU/gfx10_vdst_dfa6da.rst
@@ -5,12 +5,12 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vdst_3d7dcf:
+.. _amdgpu_synid_gfx10_vdst_dfa6da:
vdst
====
-Image data to load by an image instruction.
+Image data to be loaded by an image instruction.
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
diff --git a/llvm/docs/AMDGPU/gfx10_vdst_473a69.rst b/llvm/docs/AMDGPU/gfx10_vdst_eae4c8.rst
similarity index 78%
rename from llvm/docs/AMDGPU/gfx10_vdst_473a69.rst
rename to llvm/docs/AMDGPU/gfx10_vdst_eae4c8.rst
index 05832c35d0ef5..0e7ec7f1990af 100644
--- a/llvm/docs/AMDGPU/gfx10_vdst_473a69.rst
+++ b/llvm/docs/AMDGPU/gfx10_vdst_eae4c8.rst
@@ -5,16 +5,16 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vdst_473a69:
+.. _amdgpu_synid_gfx10_vdst_eae4c8:
vdst
====
-Image data to load by an image instruction.
+Image data to be loaded by an image instruction.
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>`, :ref:`tfe<amdgpu_synid_tfe>` and :ref:`d16<amdgpu_synid_d16>`:
-* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
+* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits, depending on :ref:`d16<amdgpu_synid_d16>`.
* :ref:`d16<amdgpu_synid_d16>` specifies that data elements in registers are packed; each value occupies 16 bits.
* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
diff --git a/llvm/docs/AMDGPU/gfx10_vdst_f47754.rst b/llvm/docs/AMDGPU/gfx10_vdst_f47754.rst
new file mode 100644
index 0000000000000..d80d8899af53a
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx10_vdst_f47754.rst
@@ -0,0 +1,17 @@
+..
+ **************************************************
+ * *
+ * Automatically generated file, do not edit! *
+ * *
+ **************************************************
+
+.. _amdgpu_synid_gfx10_vdst_f47754:
+
+vdst
+====
+
+Instruction output: data read from a memory buffer.
+
+*Size:* 4 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx10_vsrc_533a4e.rst b/llvm/docs/AMDGPU/gfx10_vsrc_ba3116.rst
similarity index 79%
rename from llvm/docs/AMDGPU/gfx10_vsrc_533a4e.rst
rename to llvm/docs/AMDGPU/gfx10_vsrc_ba3116.rst
index b45a620832651..310466c3c6e0f 100644
--- a/llvm/docs/AMDGPU/gfx10_vsrc_533a4e.rst
+++ b/llvm/docs/AMDGPU/gfx10_vsrc_ba3116.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx10_vsrc_533a4e:
+.. _amdgpu_synid_gfx10_vsrc_ba3116:
vsrc
====
Data to copy to export buffers. This is an optional operand. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
-:ref:`compr<amdgpu_synid_compr>` modifier indicates use of compressed (16-bit) data. This limits number of source operands from 4 to 2:
+The :ref:`compr<amdgpu_synid_compr>` modifier indicates the use of compressed (16-bit) data, thus decreasing the number of source operands from 4 to 2:
* src0 and src1 must specify the first register (or :ref:`off<amdgpu_synid_off>`).
* src2 and src3 must specify the second register (or :ref:`off<amdgpu_synid_off>`).
diff --git a/llvm/docs/AMDGPU/gfx10_waitcnt.rst b/llvm/docs/AMDGPU/gfx10_waitcnt.rst
index 982d3bda35bd4..1eaea2cd5adee 100644
--- a/llvm/docs/AMDGPU/gfx10_waitcnt.rst
+++ b/llvm/docs/AMDGPU/gfx10_waitcnt.rst
@@ -24,7 +24,7 @@ The bits of this operand have the following meaning:
This operand may be specified as one of the following:
-* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
+* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from 0 to 0xFFFF.
* A combination of *vmcnt*, *expcnt*, *lgkmcnt* and other values described below.
====================== ======================================================================
@@ -38,7 +38,8 @@ This operand may be specified as one of the following:
lgkmcnt_sat(<*N*>) An LGKM_CNT value computed as min(*N*, the largest LGKM_CNT value).
====================== ======================================================================
-These values may be specified in any order. Spaces, ampersands and commas may be used as optional separators.
+These values may be specified in any order. Spaces, ampersands, and commas may be used as optional separators.
+If some values are omitted, the corresponding fields will default to their maximum value.
*N* is either an
:ref:`integer number<amdgpu_synid_integer_number>` or an
diff --git a/llvm/docs/AMDGPU/gfx10_waitcnt_depctr.rst b/llvm/docs/AMDGPU/gfx10_waitcnt_depctr.rst
index dd0bd8e806669..d996feada5767 100644
--- a/llvm/docs/AMDGPU/gfx10_waitcnt_depctr.rst
+++ b/llvm/docs/AMDGPU/gfx10_waitcnt_depctr.rst
@@ -14,7 +14,7 @@ Dependency counters to wait for.
This operand may be specified as one of the following:
-* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
+* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from -32768 to 65535.
* A combination of *symbolic values* described below.
======================== ======================== ================ =================
@@ -28,7 +28,7 @@ This operand may be specified as one of the following:
depctr_vm_vsrc(<*N*>) Wait for VM_VSRC <= N 0..7 7
======================== ======================== ================ =================
- These values may be specified in any order. Spaces, ampersands and commas may be used as optional separators.
+ These values may be specified in any order. Spaces, ampersands, and commas may be used as optional separators.
Examples:
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