[PATCH] D133340: [PowerPC][GISel]select floating point constant from TOC

ChenZheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 12 01:58:19 PST 2022


shchenz added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/GISel/PPCInstructionSelector.cpp:268
+        .addReg(PPC::X2);
+  } else {
+    Register HaAddrReg =
----------------
amyk wrote:
> Since the large and medium code models looks like they differ from just the opcode, does it make sense to do something like this?
> ```
> unsigned Opcode = 0;
> if (CModel == CodeModel::Large)
>   // For large code model, generate LDtocL(CPI, ADDIStocHA8(X2, CPI))
>   Opcode = PPC::LDtocL;
> else
>   // For medium code model, generate ADDItocL(CPI, ADDIStocHA8(X2, CPI))
>   Opcode = PPC::ADDItocL;
> 
> Register HaAddrReg =
>         MRI.createVirtualRegister(&PPC::G8RC_and_G8RC_NOX0RegClass);
> BuildMI(*I.getParent(), I, DbgLoc, TII.get(PPC::ADDIStocHA8), HaAddrReg)
>         .addReg(PPC::X2)
>         .addConstantPoolIndex(CPI);
> 
> BuildMI(*I.getParent(), I, DbgLoc, TII.get(Opcode), AddrReg)
>           .addConstantPoolIndex(CPI)
>           .addReg(HaAddrReg);
> ```
Thanks, the operands order for `PPC::LDtocL` and `PPC::ADDItocL` is different and the operands number are also different. Indirect access `PPC::LDtocL` would have a memory operand. 


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