[PATCH] D139648: [RISCV] Use vmv.v.i for insertion into lane 0 of undef vector when profitable

[Philip Reames via Phabricator via llvm-commits]

reames updated this revision to Diff 481654.
reames added a comment.

Move back to LMUL1.  The regalloc effect of LMUL2 isn't a point I'd considered, and we can switch back in a separate patch which independent review if it appears worthwhile.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139648/new/

https://reviews.llvm.org/D139648

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector.ll

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