[PATCH] D139302: [RISCV] Add Syntacore SCR1 CPU model

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 8 09:08:10 PST 2022

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craig.topper added a comment.

Should the names be prefixed with "syntacore-". I assume there could be an SCR2, etc. in the future?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D139302/new/

https://reviews.llvm.org/D139302

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