[PATCH] D139618: [AArch64][SVE][Fixed length] Fix div miscompile

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:22630
 
-  // Convert the operands to scalable vectors.
-  SDValue Op0 = convertToScalableVector(DAG, ContainerVT, Op.getOperand(0));
-  SDValue Op1 = convertToScalableVector(DAG, ContainerVT, Op.getOperand(1));
+  // If wider type is not legal: split, extend, op, trunc and concat.
+  auto BisectExtendVector = [&DAG, &dl, &HalfVT, &PromVT,
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nit: This comment doesn't directly relate to BisecExtendVector


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:22631
+  // If wider type is not legal: split, extend, op, trunc and concat.
+  auto BisectExtendVector = [&DAG, &dl, &HalfVT, &PromVT,
+                             &ExtendOpcode](SDValue Op) {
----------------
nit: ExtractLoHi ?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139618/new/

https://reviews.llvm.org/D139618