[PATCH] D139413: [AAch64] Optimize muls with operands having enough sign bits. One operand is a sub.

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Can you give some more details about why is this true? I would expect the sub to have 31 sign bits.

The mul in submulwithsignbits will be commutative, so will match either way. The code needs to account for that I think, not just check for operand(1).


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  https://reviews.llvm.org/D139413/new/

https://reviews.llvm.org/D139413