[PATCH] D139391: [RISCV] Codegen support for Zfhmin.

[Monk Chiang via Phabricator via llvm-commits]

monkchiang created this revision.
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The Zfhmin subset only has FLH, FSH, FMV.X.H, FMV.H.X, FCVT.S.H, and FCVT.H.S.
If the D extension is present, the FCVT.D.H and FCVT.H.D instructions are also included.
Since most instructions are not included for Zfhmin, so most operations are promoted.
The patch primarily about making f16 a legal type.

RISC-V ISA info:
https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139391

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
  llvm/test/CodeGen/RISCV/calling-conv-half.ll
  llvm/test/CodeGen/RISCV/copysign-casts.ll
  llvm/test/CodeGen/RISCV/half-arith-strict.ll
  llvm/test/CodeGen/RISCV/half-arith.ll
  llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
  llvm/test/CodeGen/RISCV/half-br-fcmp.ll
  llvm/test/CodeGen/RISCV/half-convert-strict.ll
  llvm/test/CodeGen/RISCV/half-convert.ll
  llvm/test/CodeGen/RISCV/half-fcmp-strict.ll
  llvm/test/CodeGen/RISCV/half-fcmp.ll
  llvm/test/CodeGen/RISCV/half-frem.ll
  llvm/test/CodeGen/RISCV/half-imm.ll
  llvm/test/CodeGen/RISCV/half-intrinsics.ll
  llvm/test/CodeGen/RISCV/half-isnan.ll
  llvm/test/CodeGen/RISCV/half-mem.ll
  llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
  llvm/test/CodeGen/RISCV/half-round-conv.ll
  llvm/test/CodeGen/RISCV/half-select-fcmp.ll
  llvm/test/CodeGen/RISCV/half-select-icmp.ll
  llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert-strict.ll
  llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert.ll
  llvm/test/CodeGen/RISCV/rv64zfhmin-half-intrinsics.ll
  llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
  llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics.ll
  llvm/test/CodeGen/RISCV/zfhmin-imm.ll

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