[llvm] a1816a3 - [NFC][PowerPC] More descriptive debug messages for rr to ri conversion
Nemanja Ivanovic via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 1 17:33:41 PST 2022
Author: Nemanja Ivanovic
Date: 2022-12-01T19:32:31-06:00
New Revision: a1816a32b55b372b130dac911300a3eda11679e4
URL: https://github.com/llvm/llvm-project/commit/a1816a32b55b372b130dac911300a3eda11679e4
DIFF: https://github.com/llvm/llvm-project/commit/a1816a32b55b372b130dac911300a3eda11679e4.diff
LOG: [NFC][PowerPC] More descriptive debug messages for rr to ri conversion
Added:
Modified:
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 9cbf28454ff5..152a43849c2f 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -2119,7 +2119,11 @@ bool PPCInstrInfo::onlyFoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
PPC::ZERO8 : PPC::ZERO;
}
+ LLVM_DEBUG(dbgs() << "Folded immediate zero for: ");
+ LLVM_DEBUG(UseMI.dump());
UseMI.getOperand(UseIdx).setReg(ZeroReg);
+ LLVM_DEBUG(dbgs() << "Into: ");
+ LLVM_DEBUG(UseMI.dump());
return true;
}
@@ -4808,7 +4812,7 @@ bool PPCInstrInfo::simplifyToLI(MachineInstr &MI, MachineInstr &DefMI,
}
}
- LLVM_DEBUG(dbgs() << "Replacing instruction:\n");
+ LLVM_DEBUG(dbgs() << "Replacing constant instruction:\n");
LLVM_DEBUG(MI.dump());
LLVM_DEBUG(dbgs() << "Fed by:\n");
LLVM_DEBUG(DefMI.dump());
@@ -4894,7 +4898,7 @@ bool PPCInstrInfo::transformToNewImmFormFedByAdd(
ForwardKilledOperandReg = MI.getOperand(III.OpNoForForwarding).getReg();
// Do the transform
- LLVM_DEBUG(dbgs() << "Replacing instruction:\n");
+ LLVM_DEBUG(dbgs() << "Replacing existing reg+imm instruction:\n");
LLVM_DEBUG(MI.dump());
LLVM_DEBUG(dbgs() << "Fed by:\n");
LLVM_DEBUG(DefMI.dump());
@@ -4982,7 +4986,7 @@ bool PPCInstrInfo::transformToImmFormFedByAdd(
// We know that, the MI and DefMI both meet the pattern, and
// the Imm also meet the requirement with the new Imm-form.
// It is safe to do the transformation now.
- LLVM_DEBUG(dbgs() << "Replacing instruction:\n");
+ LLVM_DEBUG(dbgs() << "Replacing indexed instruction:\n");
LLVM_DEBUG(MI.dump());
LLVM_DEBUG(dbgs() << "Fed by:\n");
LLVM_DEBUG(DefMI.dump());
@@ -5117,6 +5121,10 @@ bool PPCInstrInfo::transformToImmFormFedByLI(MachineInstr &MI,
bool RightShift = Opc == PPC::SRW || Opc == PPC::SRW_rec || Opc == PPC::SRD ||
Opc == PPC::SRD_rec;
+ LLVM_DEBUG(dbgs() << "Replacing reg+reg instruction: ");
+ LLVM_DEBUG(MI.dump());
+ LLVM_DEBUG(dbgs() << "Fed by load-immediate: ");
+ LLVM_DEBUG(DefMI.dump());
MI.setDesc(get(III.ImmOpcode));
if (ConstantOpNo == III.OpNoForForwarding) {
// Converting shifts to immediate form is a bit tricky since they may do
@@ -5200,6 +5208,10 @@ bool PPCInstrInfo::transformToImmFormFedByLI(MachineInstr &MI,
// y = XOP reg, ForwardKilledOperandReg(killed)
if (ForwardKilledOperandReg != ~0U)
fixupIsDeadOrKill(&DefMI, &MI, ForwardKilledOperandReg);
+
+ LLVM_DEBUG(dbgs() << "With: ");
+ LLVM_DEBUG(MI.dump());
+ LLVM_DEBUG(dbgs() << "\n");
return true;
}
diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
index ae6ddafb47b9..605b2d2642e5 100644
--- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
@@ -380,6 +380,10 @@ static void convertUnprimedAccPHIs(const PPCInstrInfo *TII,
for (auto RegMBB : PHIOps)
NewPHI.add(RegMBB.first).add(RegMBB.second);
ChangedPHIMap[PHI] = NewPHI.getInstr();
+ LLVM_DEBUG(dbgs() << "Converting PHI: ");
+ LLVM_DEBUG(PHI->dump());
+ LLVM_DEBUG(dbgs() << "To: ");
+ LLVM_DEBUG(NewPHI.getInstr()->dump());
}
}
@@ -425,6 +429,8 @@ bool PPCMIPeephole::simplifyCode() {
// If the previous instruction was marked for elimination,
// remove it now.
if (ToErase) {
+ LLVM_DEBUG(dbgs() << "Deleting instruction: ");
+ LLVM_DEBUG(ToErase->dump());
ToErase->eraseFromParent();
ToErase = nullptr;
}
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