[PATCH] D138766: [InstCombine] If loading from small alloca, load whole alloca and perform variable extraction

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

riscv64 doesn't have vectors without the "v" extension, so anything involving byte vectors is going to get scalarized to something very messy.  With -mattr=+v, you get something similar to what you'd expect on other targets.

It feels a little weird to me that you're using an integer shift on a vector... I'd guess in most cases, you'd want some sort of variable shuffle (like x86 pshufb).


Repository:
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  https://reviews.llvm.org/D138766/new/

https://reviews.llvm.org/D138766