[PATCH] D138766: [InstCombine] If loading from small alloca, load whole alloca and perform variable extraction

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a reviewer: craig.topper.
spatel added a comment.
Herald added a subscriber: StephenFan.

I'm confused by the tests - do we care if the full load already exists? That's not part of the pattern match.

Does the 2x register limit mean we are also creating a double-width load? Are we relying on later passes/codegen to narrow that?

If we're trying to justify this target-independently, then lets use a less familiar target to avoid reaching the conclusion that the transform is generally good.
I have very little idea about what is happening here with RISCV64:
https://godbolt.org/z/vEcMP6P4x


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D138766