[llvm] 74c0f57 - [X86] Remove unnecessary XADD*rr overrides from bdver2 model

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-12-01T12:30:39Z
New Revision: 74c0f57d0b3f9fccf8f9c91290de45201687424b

URL: https://github.com/llvm/llvm-project/commit/74c0f57d0b3f9fccf8f9c91290de45201687424b
DIFF: https://github.com/llvm/llvm-project/commit/74c0f57d0b3f9fccf8f9c91290de45201687424b.diff

LOG: [X86] Remove unnecessary XADD*rr overrides from bdver2 model

Reported by D138359 - the overrides matched the base class schedule definition

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ScheduleBdVer2.td

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ScheduleBdVer2.td b/llvm/lib/Target/X86/X86ScheduleBdVer2.td
index 942ef59658331..c8dafcdeebd75 100644
--- a/llvm/lib/Target/X86/X86ScheduleBdVer2.td
+++ b/llvm/lib/Target/X86/X86ScheduleBdVer2.td
@@ -411,13 +411,6 @@ def PdWriteCMPXCHG16B : SchedWriteRes<[PdEX1]> {
 }
 def : InstRW<[PdWriteCMPXCHG16B], (instrs CMPXCHG16B)>;
 
-def PdWriteXADD : SchedWriteRes<[PdEX1]> {
-  let Latency = 1;
-  let ResourceCycles = [1];
-  let NumMicroOps = 2;
-}
-def : InstRW<[PdWriteXADD], (instrs XADD8rr, XADD16rr, XADD32rr, XADD64rr)>;
-
 def PdWriteXADDm : SchedWriteRes<[PdEX1]> {
   let Latency = 6;
   let ResourceCycles = [20];