[llvm] d98f74a - [AArch64] Make sure we don't emit packed unwind for .seh_save_any_reg_p

Eli Friedman via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 30 13:49:44 PST 2022


Author: Eli Friedman
Date: 2022-11-30T13:47:35-08:00
New Revision: d98f74a470d6b1bf57f3ad4e8e2c1a18ddfed491

URL: https://github.com/llvm/llvm-project/commit/d98f74a470d6b1bf57f3ad4e8e2c1a18ddfed491
DIFF: https://github.com/llvm/llvm-project/commit/d98f74a470d6b1bf57f3ad4e8e2c1a18ddfed491.diff

LOG: [AArch64] Make sure we don't emit packed unwind for .seh_save_any_reg_p

Obvious oversight in implementation in D135417.

Differential Revision: https://reviews.llvm.org/D138955

Added: 
    

Modified: 
    llvm/lib/MC/MCWin64EH.cpp
    llvm/test/MC/AArch64/seh-packed-unwind.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/MC/MCWin64EH.cpp b/llvm/lib/MC/MCWin64EH.cpp
index e4476c2e60dd5..99722704ac506 100644
--- a/llvm/lib/MC/MCWin64EH.cpp
+++ b/llvm/lib/MC/MCWin64EH.cpp
@@ -984,6 +984,21 @@ static bool tryARM64PackedUnwind(WinEH::FrameInfo *info, uint32_t FuncLength,
         return false;
       Location = End;
       break;
+    case Win64EH::UOP_SaveAnyRegI:
+    case Win64EH::UOP_SaveAnyRegIP:
+    case Win64EH::UOP_SaveAnyRegD:
+    case Win64EH::UOP_SaveAnyRegDP:
+    case Win64EH::UOP_SaveAnyRegQ:
+    case Win64EH::UOP_SaveAnyRegQP:
+    case Win64EH::UOP_SaveAnyRegIX:
+    case Win64EH::UOP_SaveAnyRegIPX:
+    case Win64EH::UOP_SaveAnyRegDX:
+    case Win64EH::UOP_SaveAnyRegDPX:
+    case Win64EH::UOP_SaveAnyRegQX:
+    case Win64EH::UOP_SaveAnyRegQPX:
+      // These are never canonical; they don't show up with the usual Arm64
+      // calling convention.
+      return false;
     }
   }
   if (RegI > 10 || RegF > 8)

diff  --git a/llvm/test/MC/AArch64/seh-packed-unwind.s b/llvm/test/MC/AArch64/seh-packed-unwind.s
index ab2d27f8f3a52..5b86ab4bc0d49 100644
--- a/llvm/test/MC/AArch64/seh-packed-unwind.s
+++ b/llvm/test/MC/AArch64/seh-packed-unwind.s
@@ -370,6 +370,12 @@
 // CHECK-NEXT:     ExceptionRecord:
 // CHECK-NEXT:     ExceptionData {
 // CHECK:            EpiloguePacked: Yes
+// CHECK:        RuntimeFunction {
+// CHECK-NEXT:     Function: nonpacked16
+// CHECK-NEXT:     ExceptionRecord:
+// CHECK-NEXT:     ExceptionData {
+// CHECK:            EpiloguePacked: Yes
+
 
     .text
 func1:
@@ -1115,3 +1121,39 @@ nonpacked15:
     .seh_endepilogue
     ret
     .seh_endproc
+
+nonpacked16:
+    .seh_proc nonpacked16
+    // Make sure we correctly analyze .seh_save_any_reg_p
+    stp     x29, x30, [sp, #-176]!
+    .seh_save_fplr_x        176
+    stp     q6, q7, [sp, #16]
+    .seh_save_any_reg_p     q6, 16
+    stp     q8, q9, [sp, #48]
+    .seh_save_any_reg_p     q8, 48
+    stp     q10, q11, [sp, #80]
+    .seh_save_any_reg_p     q10, 80
+    stp     q12, q13, [sp, #112]
+    .seh_save_any_reg_p     q12, 112
+    stp     q14, q15, [sp, #144]
+    .seh_save_any_reg_p     q14, 144
+    mov     x29, sp
+    .seh_set_fp
+    .seh_endprologue
+    nop
+    .seh_startepilogue
+    ldp     q14, q15, [sp, #144]
+    .seh_save_any_reg_p     q14, 144
+    ldp     q12, q13, [sp, #112]
+    .seh_save_any_reg_p     q12, 112
+    ldp     q10, q11, [sp, #80]
+    .seh_save_any_reg_p     q10, 80
+    ldp     q8, q9, [sp, #48]
+    .seh_save_any_reg_p     q8, 48
+    ldp     q6, q7, [sp, #16]
+    .seh_save_any_reg_p     q6, 16
+    ldp     x29, x30, [sp], #176
+    .seh_save_fplr_x        176
+    .seh_endepilogue
+    br      x9
+    .seh_endproc


        


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