[PATCH] D138883: [SelectionDAG][PowerPC] Memset reuse vector element for tail store

[Ting Wang via Phabricator via llvm-commits]

tingwang updated this revision to Diff 478808.
tingwang added reviewers: dmgreen, asavonic.
tingwang added a comment.

Changes in this update:
(1) I was trying to use `TTI.getVectorInstrCost()` to query instruction cost in `PPCTargetLowering::canCombineStoreAndExtract()`. However not able to reach TTI, and didn't find any reference to do that in SDAG. Given that the original implementation of `canCombineStoreAndExtract()` on ARM implemented its own logic to calculate `Cost`, followed the approach and implemented logic by referring to `PPCTTIImpl::getVectorInstrCost()`.

(2) Refactored logic inside `getMemsetStores()`. For PPC CombineStoreAndExtract is beneficial on some specific element index according to endianness and instruction (StoreAndExtract elements on other indexes requires vector permutation, which makes the whole idea less attractive). Since this is platform independent logic, I'm querying the cost for indexes, and pick the least cost to do the combine.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138883/new/

https://reviews.llvm.org/D138883

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/test/CodeGen/ARM/memset-align.ll
  llvm/test/CodeGen/PowerPC/p10-fi-elim.ll

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