[llvm] e726c58 - [RISCV] Add cost model coverage for vector arithmetic

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 29 11:51:05 PST 2022


Author: Philip Reames
Date: 2022-11-29T11:50:52-08:00
New Revision: e726c5879afc7a9f4496b1921687b1cd12f12bc1

URL: https://github.com/llvm/llvm-project/commit/e726c5879afc7a9f4496b1921687b1cd12f12bc1
DIFF: https://github.com/llvm/llvm-project/commit/e726c5879afc7a9f4496b1921687b1cd12f12bc1.diff

LOG: [RISCV] Add cost model coverage for vector arithmetic

Added: 
    llvm/test/Analysis/CostModel/RISCV/arith-int.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Analysis/CostModel/RISCV/arith-int.ll b/llvm/test/Analysis/CostModel/RISCV/arith-int.ll
new file mode 100644
index 000000000000..07599a5e3a6a
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/RISCV/arith-int.ll
@@ -0,0 +1,804 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+experimental-zvfh -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 < %s | FileCheck %s
+; Check that we don't crash querying costs when vectors are not enabled.
+; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv64
+
+define i32 @add() {
+; CHECK-LABEL: 'add'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I16 = add <1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I16 = add <2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I16 = add <4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = add <16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = add <32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I16 = add <vscale x 1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I16 = add <vscale x 2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I16 = add <vscale x 4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I16 = add <vscale x 8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I16 = add <vscale x 16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV32I16 = add <vscale x 32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I32 = add <1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I32 = add <2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = add <8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = add <16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I32 = add <vscale x 1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I32 = add <vscale x 2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I32 = add <vscale x 4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I32 = add <vscale x 8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I32 = add <vscale x 16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I64 = add <1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = add <4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = add <8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I64 = add <vscale x 1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I64 = add <vscale x 2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I64 = add <vscale x 4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I64 = add <vscale x 8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
+;
+  %I16 = add i16 undef, undef
+  %I32 = add i32 undef, undef
+  %I64 = add i64 undef, undef
+
+  %V1I16 = add <1 x i16> undef, undef
+  %V2I16 = add <2 x i16> undef, undef
+  %V4I16 = add <4 x i16> undef, undef
+  %V8I16 = add <8 x i16> undef, undef
+  %V16I16 = add <16 x i16> undef, undef
+  %V32I16 = add <32 x i16> undef, undef
+
+  %NXV1I16 = add <vscale x 1 x i16> undef, undef
+  %NXV2I16 = add <vscale x 2 x i16> undef, undef
+  %NXV4I16 = add <vscale x 4 x i16> undef, undef
+  %NXV8I16 = add <vscale x 8 x i16> undef, undef
+  %NXV16I16 = add <vscale x 16 x i16> undef, undef
+  %NXV32I16 = add <vscale x 32 x i16> undef, undef
+
+  %V1I32 = add <1 x i32> undef, undef
+  %V2I32 = add <2 x i32> undef, undef
+  %V4I32 = add <4 x i32> undef, undef
+  %V8I32 = add <8 x i32> undef, undef
+  %V16I32 = add <16 x i32> undef, undef
+
+  %NXV1I32 = add <vscale x 1 x i32> undef, undef
+  %NXV2I32 = add <vscale x 2 x i32> undef, undef
+  %NXV4I32 = add <vscale x 4 x i32> undef, undef
+  %NXV8I32 = add <vscale x 8 x i32> undef, undef
+  %NXV16I32 = add <vscale x 16 x i32> undef, undef
+
+  %V1I64 = add <1 x i64> undef, undef
+  %V2I64 = add <2 x i64> undef, undef
+  %V4I64 = add <4 x i64> undef, undef
+  %V8I64 = add <8 x i64> undef, undef
+
+  %NXV1I64 = add <vscale x 1 x i64> undef, undef
+  %NXV2I64 = add <vscale x 2 x i64> undef, undef
+  %NXV4I64 = add <vscale x 4 x i64> undef, undef
+  %NXV8I64 = add <vscale x 8 x i64> undef, undef
+
+  ret i32 undef
+}
+
+define i32 @sub() {
+; CHECK-LABEL: 'sub'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I16 = sub <1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I16 = sub <2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I16 = sub <4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = sub <16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = sub <32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I16 = sub <vscale x 1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I16 = sub <vscale x 2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I16 = sub <vscale x 4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I16 = sub <vscale x 8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I16 = sub <vscale x 16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV32I16 = sub <vscale x 32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I32 = sub <1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I32 = sub <2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = sub <8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = sub <16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I32 = sub <vscale x 1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I32 = sub <vscale x 2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I32 = sub <vscale x 4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I32 = sub <vscale x 8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I32 = sub <vscale x 16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I64 = sub <1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = sub <2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = sub <4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = sub <8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I64 = sub <vscale x 1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I64 = sub <vscale x 2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I64 = sub <vscale x 4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I64 = sub <vscale x 8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
+;
+  %I16 = sub i16 undef, undef
+  %I32 = sub i32 undef, undef
+  %I64 = sub i64 undef, undef
+
+  %V1I16 = sub <1 x i16> undef, undef
+  %V2I16 = sub <2 x i16> undef, undef
+  %V4I16 = sub <4 x i16> undef, undef
+  %V8I16 = sub <8 x i16> undef, undef
+  %V16I16 = sub <16 x i16> undef, undef
+  %V32I16 = sub <32 x i16> undef, undef
+
+  %NXV1I16 = sub <vscale x 1 x i16> undef, undef
+  %NXV2I16 = sub <vscale x 2 x i16> undef, undef
+  %NXV4I16 = sub <vscale x 4 x i16> undef, undef
+  %NXV8I16 = sub <vscale x 8 x i16> undef, undef
+  %NXV16I16 = sub <vscale x 16 x i16> undef, undef
+  %NXV32I16 = sub <vscale x 32 x i16> undef, undef
+
+  %V1I32 = sub <1 x i32> undef, undef
+  %V2I32 = sub <2 x i32> undef, undef
+  %V4I32 = sub <4 x i32> undef, undef
+  %V8I32 = sub <8 x i32> undef, undef
+  %V16I32 = sub <16 x i32> undef, undef
+
+  %NXV1I32 = sub <vscale x 1 x i32> undef, undef
+  %NXV2I32 = sub <vscale x 2 x i32> undef, undef
+  %NXV4I32 = sub <vscale x 4 x i32> undef, undef
+  %NXV8I32 = sub <vscale x 8 x i32> undef, undef
+  %NXV16I32 = sub <vscale x 16 x i32> undef, undef
+
+  %V1I64 = sub <1 x i64> undef, undef
+  %V2I64 = sub <2 x i64> undef, undef
+  %V4I64 = sub <4 x i64> undef, undef
+  %V8I64 = sub <8 x i64> undef, undef
+
+  %NXV1I64 = sub <vscale x 1 x i64> undef, undef
+  %NXV2I64 = sub <vscale x 2 x i64> undef, undef
+  %NXV4I64 = sub <vscale x 4 x i64> undef, undef
+  %NXV8I64 = sub <vscale x 8 x i64> undef, undef
+
+  ret i32 undef
+}
+
+define i32 @mul() {
+; CHECK-LABEL: 'mul'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = mul i16 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = mul i32 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I16 = mul <1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I16 = mul <2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I16 = mul <4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = mul <8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = mul <16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = mul <32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I16 = mul <vscale x 1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I16 = mul <vscale x 2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I16 = mul <vscale x 4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I16 = mul <vscale x 8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I16 = mul <vscale x 16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV32I16 = mul <vscale x 32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I32 = mul <1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I32 = mul <2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = mul <4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = mul <8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = mul <16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I32 = mul <vscale x 1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I32 = mul <vscale x 2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I32 = mul <vscale x 4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I32 = mul <vscale x 8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I32 = mul <vscale x 16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I64 = mul <1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = mul <2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = mul <4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = mul <8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I64 = mul <vscale x 1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I64 = mul <vscale x 2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I64 = mul <vscale x 4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I64 = mul <vscale x 8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
+;
+  %I16 = mul i16 undef, undef
+  %I32 = mul i32 undef, undef
+  %I64 = mul i64 undef, undef
+
+  %V1I16 = mul <1 x i16> undef, undef
+  %V2I16 = mul <2 x i16> undef, undef
+  %V4I16 = mul <4 x i16> undef, undef
+  %V8I16 = mul <8 x i16> undef, undef
+  %V16I16 = mul <16 x i16> undef, undef
+  %V32I16 = mul <32 x i16> undef, undef
+
+  %NXV1I16 = mul <vscale x 1 x i16> undef, undef
+  %NXV2I16 = mul <vscale x 2 x i16> undef, undef
+  %NXV4I16 = mul <vscale x 4 x i16> undef, undef
+  %NXV8I16 = mul <vscale x 8 x i16> undef, undef
+  %NXV16I16 = mul <vscale x 16 x i16> undef, undef
+  %NXV32I16 = mul <vscale x 32 x i16> undef, undef
+
+  %V1I32 = mul <1 x i32> undef, undef
+  %V2I32 = mul <2 x i32> undef, undef
+  %V4I32 = mul <4 x i32> undef, undef
+  %V8I32 = mul <8 x i32> undef, undef
+  %V16I32 = mul <16 x i32> undef, undef
+
+  %NXV1I32 = mul <vscale x 1 x i32> undef, undef
+  %NXV2I32 = mul <vscale x 2 x i32> undef, undef
+  %NXV4I32 = mul <vscale x 4 x i32> undef, undef
+  %NXV8I32 = mul <vscale x 8 x i32> undef, undef
+  %NXV16I32 = mul <vscale x 16 x i32> undef, undef
+
+  %V1I64 = mul <1 x i64> undef, undef
+  %V2I64 = mul <2 x i64> undef, undef
+  %V4I64 = mul <4 x i64> undef, undef
+  %V8I64 = mul <8 x i64> undef, undef
+
+  %NXV1I64 = mul <vscale x 1 x i64> undef, undef
+  %NXV2I64 = mul <vscale x 2 x i64> undef, undef
+  %NXV4I64 = mul <vscale x 4 x i64> undef, undef
+  %NXV8I64 = mul <vscale x 8 x i64> undef, undef
+
+  ret i32 undef
+}
+
+define i32 @shl() {
+; CHECK-LABEL: 'shl'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = shl i16 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = shl i32 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = shl i64 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I16 = shl <1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I16 = shl <2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I16 = shl <4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = shl <8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = shl <16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = shl <32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I16 = shl <vscale x 1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I16 = shl <vscale x 2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I16 = shl <vscale x 4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I16 = shl <vscale x 8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I16 = shl <vscale x 16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV32I16 = shl <vscale x 32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I32 = shl <1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I32 = shl <2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = shl <4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = shl <8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = shl <16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I32 = shl <vscale x 1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I32 = shl <vscale x 2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I32 = shl <vscale x 4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I32 = shl <vscale x 8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I32 = shl <vscale x 16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I64 = shl <1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = shl <2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = shl <4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = shl <8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I64 = shl <vscale x 1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I64 = shl <vscale x 2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I64 = shl <vscale x 4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I64 = shl <vscale x 8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
+;
+  %I16 = shl i16 undef, undef
+  %I32 = shl i32 undef, undef
+  %I64 = shl i64 undef, undef
+
+  %V1I16 = shl <1 x i16> undef, undef
+  %V2I16 = shl <2 x i16> undef, undef
+  %V4I16 = shl <4 x i16> undef, undef
+  %V8I16 = shl <8 x i16> undef, undef
+  %V16I16 = shl <16 x i16> undef, undef
+  %V32I16 = shl <32 x i16> undef, undef
+
+  %NXV1I16 = shl <vscale x 1 x i16> undef, undef
+  %NXV2I16 = shl <vscale x 2 x i16> undef, undef
+  %NXV4I16 = shl <vscale x 4 x i16> undef, undef
+  %NXV8I16 = shl <vscale x 8 x i16> undef, undef
+  %NXV16I16 = shl <vscale x 16 x i16> undef, undef
+  %NXV32I16 = shl <vscale x 32 x i16> undef, undef
+
+  %V1I32 = shl <1 x i32> undef, undef
+  %V2I32 = shl <2 x i32> undef, undef
+  %V4I32 = shl <4 x i32> undef, undef
+  %V8I32 = shl <8 x i32> undef, undef
+  %V16I32 = shl <16 x i32> undef, undef
+
+  %NXV1I32 = shl <vscale x 1 x i32> undef, undef
+  %NXV2I32 = shl <vscale x 2 x i32> undef, undef
+  %NXV4I32 = shl <vscale x 4 x i32> undef, undef
+  %NXV8I32 = shl <vscale x 8 x i32> undef, undef
+  %NXV16I32 = shl <vscale x 16 x i32> undef, undef
+
+  %V1I64 = shl <1 x i64> undef, undef
+  %V2I64 = shl <2 x i64> undef, undef
+  %V4I64 = shl <4 x i64> undef, undef
+  %V8I64 = shl <8 x i64> undef, undef
+
+  %NXV1I64 = shl <vscale x 1 x i64> undef, undef
+  %NXV2I64 = shl <vscale x 2 x i64> undef, undef
+  %NXV4I64 = shl <vscale x 4 x i64> undef, undef
+  %NXV8I64 = shl <vscale x 8 x i64> undef, undef
+
+  ret i32 undef
+}
+
+define i32 @lshr() {
+; CHECK-LABEL: 'lshr'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = lshr i16 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = lshr i32 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = lshr i64 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I16 = lshr <1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I16 = lshr <2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I16 = lshr <4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = lshr <8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = lshr <16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = lshr <32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I16 = lshr <vscale x 1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I16 = lshr <vscale x 2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I16 = lshr <vscale x 4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I16 = lshr <vscale x 8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I16 = lshr <vscale x 16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV32I16 = lshr <vscale x 32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I32 = lshr <1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I32 = lshr <2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = lshr <4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = lshr <8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = lshr <16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I32 = lshr <vscale x 1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I32 = lshr <vscale x 2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I32 = lshr <vscale x 4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I32 = lshr <vscale x 8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I32 = lshr <vscale x 16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I64 = lshr <1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = lshr <2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = lshr <4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = lshr <8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I64 = lshr <vscale x 1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I64 = lshr <vscale x 2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I64 = lshr <vscale x 4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I64 = lshr <vscale x 8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
+;
+  %I16 = lshr i16 undef, undef
+  %I32 = lshr i32 undef, undef
+  %I64 = lshr i64 undef, undef
+
+  %V1I16 = lshr <1 x i16> undef, undef
+  %V2I16 = lshr <2 x i16> undef, undef
+  %V4I16 = lshr <4 x i16> undef, undef
+  %V8I16 = lshr <8 x i16> undef, undef
+  %V16I16 = lshr <16 x i16> undef, undef
+  %V32I16 = lshr <32 x i16> undef, undef
+
+  %NXV1I16 = lshr <vscale x 1 x i16> undef, undef
+  %NXV2I16 = lshr <vscale x 2 x i16> undef, undef
+  %NXV4I16 = lshr <vscale x 4 x i16> undef, undef
+  %NXV8I16 = lshr <vscale x 8 x i16> undef, undef
+  %NXV16I16 = lshr <vscale x 16 x i16> undef, undef
+  %NXV32I16 = lshr <vscale x 32 x i16> undef, undef
+
+  %V1I32 = lshr <1 x i32> undef, undef
+  %V2I32 = lshr <2 x i32> undef, undef
+  %V4I32 = lshr <4 x i32> undef, undef
+  %V8I32 = lshr <8 x i32> undef, undef
+  %V16I32 = lshr <16 x i32> undef, undef
+
+  %NXV1I32 = lshr <vscale x 1 x i32> undef, undef
+  %NXV2I32 = lshr <vscale x 2 x i32> undef, undef
+  %NXV4I32 = lshr <vscale x 4 x i32> undef, undef
+  %NXV8I32 = lshr <vscale x 8 x i32> undef, undef
+  %NXV16I32 = lshr <vscale x 16 x i32> undef, undef
+
+  %V1I64 = lshr <1 x i64> undef, undef
+  %V2I64 = lshr <2 x i64> undef, undef
+  %V4I64 = lshr <4 x i64> undef, undef
+  %V8I64 = lshr <8 x i64> undef, undef
+
+  %NXV1I64 = lshr <vscale x 1 x i64> undef, undef
+  %NXV2I64 = lshr <vscale x 2 x i64> undef, undef
+  %NXV4I64 = lshr <vscale x 4 x i64> undef, undef
+  %NXV8I64 = lshr <vscale x 8 x i64> undef, undef
+
+  ret i32 undef
+}
+
+define i32 @ashr() {
+; CHECK-LABEL: 'ashr'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = ashr i16 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = ashr i32 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = ashr i64 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I16 = ashr <1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I16 = ashr <2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I16 = ashr <4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = ashr <8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = ashr <16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = ashr <32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I16 = ashr <vscale x 1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I16 = ashr <vscale x 2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I16 = ashr <vscale x 4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I16 = ashr <vscale x 8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I16 = ashr <vscale x 16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV32I16 = ashr <vscale x 32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I32 = ashr <1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I32 = ashr <2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = ashr <4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = ashr <8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = ashr <16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I32 = ashr <vscale x 1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I32 = ashr <vscale x 2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I32 = ashr <vscale x 4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I32 = ashr <vscale x 8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I32 = ashr <vscale x 16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1I64 = ashr <1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = ashr <2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = ashr <4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = ashr <8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I64 = ashr <vscale x 1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I64 = ashr <vscale x 2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I64 = ashr <vscale x 4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I64 = ashr <vscale x 8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
+;
+  %I16 = ashr i16 undef, undef
+  %I32 = ashr i32 undef, undef
+  %I64 = ashr i64 undef, undef
+
+  %V1I16 = ashr <1 x i16> undef, undef
+  %V2I16 = ashr <2 x i16> undef, undef
+  %V4I16 = ashr <4 x i16> undef, undef
+  %V8I16 = ashr <8 x i16> undef, undef
+  %V16I16 = ashr <16 x i16> undef, undef
+  %V32I16 = ashr <32 x i16> undef, undef
+
+  %NXV1I16 = ashr <vscale x 1 x i16> undef, undef
+  %NXV2I16 = ashr <vscale x 2 x i16> undef, undef
+  %NXV4I16 = ashr <vscale x 4 x i16> undef, undef
+  %NXV8I16 = ashr <vscale x 8 x i16> undef, undef
+  %NXV16I16 = ashr <vscale x 16 x i16> undef, undef
+  %NXV32I16 = ashr <vscale x 32 x i16> undef, undef
+
+  %V1I32 = ashr <1 x i32> undef, undef
+  %V2I32 = ashr <2 x i32> undef, undef
+  %V4I32 = ashr <4 x i32> undef, undef
+  %V8I32 = ashr <8 x i32> undef, undef
+  %V16I32 = ashr <16 x i32> undef, undef
+
+  %NXV1I32 = ashr <vscale x 1 x i32> undef, undef
+  %NXV2I32 = ashr <vscale x 2 x i32> undef, undef
+  %NXV4I32 = ashr <vscale x 4 x i32> undef, undef
+  %NXV8I32 = ashr <vscale x 8 x i32> undef, undef
+  %NXV16I32 = ashr <vscale x 16 x i32> undef, undef
+
+  %V1I64 = ashr <1 x i64> undef, undef
+  %V2I64 = ashr <2 x i64> undef, undef
+  %V4I64 = ashr <4 x i64> undef, undef
+  %V8I64 = ashr <8 x i64> undef, undef
+
+  %NXV1I64 = ashr <vscale x 1 x i64> undef, undef
+  %NXV2I64 = ashr <vscale x 2 x i64> undef, undef
+  %NXV4I64 = ashr <vscale x 4 x i64> undef, undef
+  %NXV8I64 = ashr <vscale x 8 x i64> undef, undef
+
+  ret i32 undef
+}
+
+define i32 @udiv() {
+; CHECK-LABEL: 'udiv'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = udiv i16 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = udiv i32 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = udiv i64 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I16 = udiv <1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I16 = udiv <2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I16 = udiv <4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8I16 = udiv <8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16I16 = udiv <16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32I16 = udiv <32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I16 = udiv <vscale x 1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I16 = udiv <vscale x 2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I16 = udiv <vscale x 4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I16 = udiv <vscale x 8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I16 = udiv <vscale x 16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV32I16 = udiv <vscale x 32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I32 = udiv <1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I32 = udiv <2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I32 = udiv <4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8I32 = udiv <8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16I32 = udiv <16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I32 = udiv <vscale x 1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I32 = udiv <vscale x 2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I32 = udiv <vscale x 4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I32 = udiv <vscale x 8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I32 = udiv <vscale x 16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I64 = udiv <1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I64 = udiv <2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = udiv <4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = udiv <8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I64 = udiv <vscale x 1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I64 = udiv <vscale x 2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I64 = udiv <vscale x 4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I64 = udiv <vscale x 8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
+;
+  %I16 = udiv i16 undef, undef
+  %I32 = udiv i32 undef, undef
+  %I64 = udiv i64 undef, undef
+
+  %V1I16 = udiv <1 x i16> undef, undef
+  %V2I16 = udiv <2 x i16> undef, undef
+  %V4I16 = udiv <4 x i16> undef, undef
+  %V8I16 = udiv <8 x i16> undef, undef
+  %V16I16 = udiv <16 x i16> undef, undef
+  %V32I16 = udiv <32 x i16> undef, undef
+
+  %NXV1I16 = udiv <vscale x 1 x i16> undef, undef
+  %NXV2I16 = udiv <vscale x 2 x i16> undef, undef
+  %NXV4I16 = udiv <vscale x 4 x i16> undef, undef
+  %NXV8I16 = udiv <vscale x 8 x i16> undef, undef
+  %NXV16I16 = udiv <vscale x 16 x i16> undef, undef
+  %NXV32I16 = udiv <vscale x 32 x i16> undef, undef
+
+  %V1I32 = udiv <1 x i32> undef, undef
+  %V2I32 = udiv <2 x i32> undef, undef
+  %V4I32 = udiv <4 x i32> undef, undef
+  %V8I32 = udiv <8 x i32> undef, undef
+  %V16I32 = udiv <16 x i32> undef, undef
+
+  %NXV1I32 = udiv <vscale x 1 x i32> undef, undef
+  %NXV2I32 = udiv <vscale x 2 x i32> undef, undef
+  %NXV4I32 = udiv <vscale x 4 x i32> undef, undef
+  %NXV8I32 = udiv <vscale x 8 x i32> undef, undef
+  %NXV16I32 = udiv <vscale x 16 x i32> undef, undef
+
+  %V1I64 = udiv <1 x i64> undef, undef
+  %V2I64 = udiv <2 x i64> undef, undef
+  %V4I64 = udiv <4 x i64> undef, undef
+  %V8I64 = udiv <8 x i64> undef, undef
+
+  %NXV1I64 = udiv <vscale x 1 x i64> undef, undef
+  %NXV2I64 = udiv <vscale x 2 x i64> undef, undef
+  %NXV4I64 = udiv <vscale x 4 x i64> undef, undef
+  %NXV8I64 = udiv <vscale x 8 x i64> undef, undef
+
+  ret i32 undef
+}
+
+define i32 @urem() {
+; CHECK-LABEL: 'urem'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = urem i16 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = urem i32 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = urem i64 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I16 = urem <1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I16 = urem <2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I16 = urem <4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8I16 = urem <8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16I16 = urem <16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32I16 = urem <32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I16 = urem <vscale x 1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I16 = urem <vscale x 2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I16 = urem <vscale x 4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I16 = urem <vscale x 8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I16 = urem <vscale x 16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV32I16 = urem <vscale x 32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I32 = urem <1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I32 = urem <2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I32 = urem <4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8I32 = urem <8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16I32 = urem <16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I32 = urem <vscale x 1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I32 = urem <vscale x 2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I32 = urem <vscale x 4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I32 = urem <vscale x 8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I32 = urem <vscale x 16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I64 = urem <1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I64 = urem <2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = urem <4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = urem <8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I64 = urem <vscale x 1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I64 = urem <vscale x 2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I64 = urem <vscale x 4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I64 = urem <vscale x 8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
+;
+  %I16 = urem i16 undef, undef
+  %I32 = urem i32 undef, undef
+  %I64 = urem i64 undef, undef
+
+  %V1I16 = urem <1 x i16> undef, undef
+  %V2I16 = urem <2 x i16> undef, undef
+  %V4I16 = urem <4 x i16> undef, undef
+  %V8I16 = urem <8 x i16> undef, undef
+  %V16I16 = urem <16 x i16> undef, undef
+  %V32I16 = urem <32 x i16> undef, undef
+
+  %NXV1I16 = urem <vscale x 1 x i16> undef, undef
+  %NXV2I16 = urem <vscale x 2 x i16> undef, undef
+  %NXV4I16 = urem <vscale x 4 x i16> undef, undef
+  %NXV8I16 = urem <vscale x 8 x i16> undef, undef
+  %NXV16I16 = urem <vscale x 16 x i16> undef, undef
+  %NXV32I16 = urem <vscale x 32 x i16> undef, undef
+
+  %V1I32 = urem <1 x i32> undef, undef
+  %V2I32 = urem <2 x i32> undef, undef
+  %V4I32 = urem <4 x i32> undef, undef
+  %V8I32 = urem <8 x i32> undef, undef
+  %V16I32 = urem <16 x i32> undef, undef
+
+  %NXV1I32 = urem <vscale x 1 x i32> undef, undef
+  %NXV2I32 = urem <vscale x 2 x i32> undef, undef
+  %NXV4I32 = urem <vscale x 4 x i32> undef, undef
+  %NXV8I32 = urem <vscale x 8 x i32> undef, undef
+  %NXV16I32 = urem <vscale x 16 x i32> undef, undef
+
+  %V1I64 = urem <1 x i64> undef, undef
+  %V2I64 = urem <2 x i64> undef, undef
+  %V4I64 = urem <4 x i64> undef, undef
+  %V8I64 = urem <8 x i64> undef, undef
+
+  %NXV1I64 = urem <vscale x 1 x i64> undef, undef
+  %NXV2I64 = urem <vscale x 2 x i64> undef, undef
+  %NXV4I64 = urem <vscale x 4 x i64> undef, undef
+  %NXV8I64 = urem <vscale x 8 x i64> undef, undef
+
+  ret i32 undef
+}
+
+define i32 @sdiv() {
+; CHECK-LABEL: 'sdiv'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sdiv i16 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sdiv i32 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sdiv i64 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I16 = sdiv <1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I16 = sdiv <2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I16 = sdiv <4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8I16 = sdiv <8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16I16 = sdiv <16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32I16 = sdiv <32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I16 = sdiv <vscale x 1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I16 = sdiv <vscale x 2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I16 = sdiv <vscale x 4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I16 = sdiv <vscale x 8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I16 = sdiv <vscale x 16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV32I16 = sdiv <vscale x 32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I32 = sdiv <1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I32 = sdiv <2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I32 = sdiv <4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8I32 = sdiv <8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16I32 = sdiv <16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I32 = sdiv <vscale x 1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I32 = sdiv <vscale x 2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I32 = sdiv <vscale x 4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I32 = sdiv <vscale x 8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I32 = sdiv <vscale x 16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I64 = sdiv <1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I64 = sdiv <2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = sdiv <4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = sdiv <8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I64 = sdiv <vscale x 1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I64 = sdiv <vscale x 2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I64 = sdiv <vscale x 4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I64 = sdiv <vscale x 8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
+;
+  %I16 = sdiv i16 undef, undef
+  %I32 = sdiv i32 undef, undef
+  %I64 = sdiv i64 undef, undef
+
+  %V1I16 = sdiv <1 x i16> undef, undef
+  %V2I16 = sdiv <2 x i16> undef, undef
+  %V4I16 = sdiv <4 x i16> undef, undef
+  %V8I16 = sdiv <8 x i16> undef, undef
+  %V16I16 = sdiv <16 x i16> undef, undef
+  %V32I16 = sdiv <32 x i16> undef, undef
+
+  %NXV1I16 = sdiv <vscale x 1 x i16> undef, undef
+  %NXV2I16 = sdiv <vscale x 2 x i16> undef, undef
+  %NXV4I16 = sdiv <vscale x 4 x i16> undef, undef
+  %NXV8I16 = sdiv <vscale x 8 x i16> undef, undef
+  %NXV16I16 = sdiv <vscale x 16 x i16> undef, undef
+  %NXV32I16 = sdiv <vscale x 32 x i16> undef, undef
+
+  %V1I32 = sdiv <1 x i32> undef, undef
+  %V2I32 = sdiv <2 x i32> undef, undef
+  %V4I32 = sdiv <4 x i32> undef, undef
+  %V8I32 = sdiv <8 x i32> undef, undef
+  %V16I32 = sdiv <16 x i32> undef, undef
+
+  %NXV1I32 = sdiv <vscale x 1 x i32> undef, undef
+  %NXV2I32 = sdiv <vscale x 2 x i32> undef, undef
+  %NXV4I32 = sdiv <vscale x 4 x i32> undef, undef
+  %NXV8I32 = sdiv <vscale x 8 x i32> undef, undef
+  %NXV16I32 = sdiv <vscale x 16 x i32> undef, undef
+
+  %V1I64 = sdiv <1 x i64> undef, undef
+  %V2I64 = sdiv <2 x i64> undef, undef
+  %V4I64 = sdiv <4 x i64> undef, undef
+  %V8I64 = sdiv <8 x i64> undef, undef
+
+  %NXV1I64 = sdiv <vscale x 1 x i64> undef, undef
+  %NXV2I64 = sdiv <vscale x 2 x i64> undef, undef
+  %NXV4I64 = sdiv <vscale x 4 x i64> undef, undef
+  %NXV8I64 = sdiv <vscale x 8 x i64> undef, undef
+
+  ret i32 undef
+}
+
+define i32 @srem() {
+; CHECK-LABEL: 'srem'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = srem i16 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = srem i32 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = srem i64 undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I16 = srem <1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I16 = srem <2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I16 = srem <4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8I16 = srem <8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16I16 = srem <16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32I16 = srem <32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I16 = srem <vscale x 1 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I16 = srem <vscale x 2 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I16 = srem <vscale x 4 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I16 = srem <vscale x 8 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I16 = srem <vscale x 16 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV32I16 = srem <vscale x 32 x i16> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I32 = srem <1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I32 = srem <2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4I32 = srem <4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8I32 = srem <8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16I32 = srem <16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I32 = srem <vscale x 1 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I32 = srem <vscale x 2 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I32 = srem <vscale x 4 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I32 = srem <vscale x 8 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV16I32 = srem <vscale x 16 x i32> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V1I64 = srem <1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2I64 = srem <2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = srem <4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = srem <8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV1I64 = srem <vscale x 1 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV2I64 = srem <vscale x 2 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV4I64 = srem <vscale x 4 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %NXV8I64 = srem <vscale x 8 x i64> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
+;
+  %I16 = srem i16 undef, undef
+  %I32 = srem i32 undef, undef
+  %I64 = srem i64 undef, undef
+
+  %V1I16 = srem <1 x i16> undef, undef
+  %V2I16 = srem <2 x i16> undef, undef
+  %V4I16 = srem <4 x i16> undef, undef
+  %V8I16 = srem <8 x i16> undef, undef
+  %V16I16 = srem <16 x i16> undef, undef
+  %V32I16 = srem <32 x i16> undef, undef
+
+  %NXV1I16 = srem <vscale x 1 x i16> undef, undef
+  %NXV2I16 = srem <vscale x 2 x i16> undef, undef
+  %NXV4I16 = srem <vscale x 4 x i16> undef, undef
+  %NXV8I16 = srem <vscale x 8 x i16> undef, undef
+  %NXV16I16 = srem <vscale x 16 x i16> undef, undef
+  %NXV32I16 = srem <vscale x 32 x i16> undef, undef
+
+  %V1I32 = srem <1 x i32> undef, undef
+  %V2I32 = srem <2 x i32> undef, undef
+  %V4I32 = srem <4 x i32> undef, undef
+  %V8I32 = srem <8 x i32> undef, undef
+  %V16I32 = srem <16 x i32> undef, undef
+
+  %NXV1I32 = srem <vscale x 1 x i32> undef, undef
+  %NXV2I32 = srem <vscale x 2 x i32> undef, undef
+  %NXV4I32 = srem <vscale x 4 x i32> undef, undef
+  %NXV8I32 = srem <vscale x 8 x i32> undef, undef
+  %NXV16I32 = srem <vscale x 16 x i32> undef, undef
+
+  %V1I64 = srem <1 x i64> undef, undef
+  %V2I64 = srem <2 x i64> undef, undef
+  %V4I64 = srem <4 x i64> undef, undef
+  %V8I64 = srem <8 x i64> undef, undef
+
+  %NXV1I64 = srem <vscale x 1 x i64> undef, undef
+  %NXV2I64 = srem <vscale x 2 x i64> undef, undef
+  %NXV4I64 = srem <vscale x 4 x i64> undef, undef
+  %NXV8I64 = srem <vscale x 8 x i64> undef, undef
+
+  ret i32 undef
+}


        


More information about the llvm-commits mailing list