[PATCH] D138757: [zero-call-used-regs] Mark only non-debug instruction's register as used

[Nick Desaulniers via Phabricator via llvm-commits]

nickdesaulniers added a comment.

In D138757#3957674 <https://reviews.llvm.org/D138757#3957674>, @dblaikie wrote:

> In D138757#3955993 <https://reviews.llvm.org/D138757#3955993>, @xgupta wrote:
>
>>> Can't say I'm especially familiar with `update_llc_test_checks.py` and where it could/should be used (I guess by the name, it's for updating existing tests - so maybe this needs a new test written?) But, yes, either way, may require writing a test with hand-crafted `CHECK` lines.
>>
>> OK, Does it requires mir, assembly or llvm ir testcase because there is no change at ir level wrt -g or without -g, see https://godbolt.org/z/ndz36Kn3P.

Not true: https://godbolt.org/z/6516an1rh
Without -g, there is no calls to the `@llvm.dbg.value` intrinsic or `!dbg` metadata nodes.

> I'd probably do it in IR->asm, but other folks might be more familiar with how to do this as a narrower MIR test or the like.

Ah, they joys of writing MIR tests...a MIR test is appropriate, since this is only one pass we need to test; PEI.

To help generate a test, I recommend:

1. dump IR
2. llvm-reduce IR
3. `llc -O2 -stop-before=prolog-epilog-insertion -o new_mir_test.mir`
4. add the `; RUN: ` line to `new_mir_test.mir`: `; RUN: llc -run-pass=prolog-epilog-insertion ...`

That way you don't have to write MIR by hand, and we get a concise and quick test.

Or you can simply add another IR test case to the existing test for this feature.
llvm/test/CodeGen/X86/zero-call-used-regs.ll
or
llvm/test/CodeGen/AArch64/zero-call-used-regs.ll
would be appropriate.

I don't care which you do. The IR->asm test is probably easier; writing MIR tests builds character (and they run faster, since we're running less of the compilation pipeline).


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