[PATCH] D138883: [SelectionDAG][PowerPC] Memset reuse vector element for tail store

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7277
         Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
-      else
-        Value = getMemsetValue(Src, VT, DAG, dl);
+      else {
+        bool ConstFromVector = false;
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Can we reduce the nesting here by converting this to `else if`?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D138883/new/

https://reviews.llvm.org/D138883