[PATCH] D138832: [llvm-exegesis][x86] Add option to prevent use of xmm8-xmm15 upper SSE registers

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
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Noticed while trying to use llvm-exegesis to get some accurate capture numbers on some old Atom/Silverment hardware as part of the work with D103695 <https://reviews.llvm.org/D103695>.

These targets' frontends are particularly poor and the use of the xmm8-xmm15 SSE registers results in longer instruction encodings which were affecting the latency/throughput estimates.

I'm not sure how best to add test coverage for this - any suggestions?


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138832

Files:
  llvm/docs/CommandGuide/llvm-exegesis.rst
  llvm/tools/llvm-exegesis/lib/X86/Target.cpp


Index: llvm/tools/llvm-exegesis/lib/X86/Target.cpp
===================================================================
--- llvm/tools/llvm-exegesis/lib/X86/Target.cpp
+++ llvm/tools/llvm-exegesis/lib/X86/Target.cpp
@@ -54,6 +54,11 @@
     cl::desc("The sample period (nbranches/sample), used for LBR sampling"),
     cl::cat(BenchmarkOptions), cl::init(0));
 
+static cl::opt<bool>
+    DisableUpperSSERegisters("x86-disable-upper-sse-registers",
+                             cl::desc("Disable XMM8-XMM15 register usage"),
+                             cl::cat(BenchmarkOptions), cl::init(false));
+
 // FIXME: Validates that repetition-mode is loop if LBR is requested.
 
 // Returns a non-null reason if we cannot handle the memory references in this
@@ -708,6 +713,11 @@
                                const APInt &Value) const override;
 
   ArrayRef<unsigned> getUnavailableRegisters() const override {
+    if (DisableUpperSSERegisters)
+      return makeArrayRef(kUnavailableRegistersSSE,
+                          sizeof(kUnavailableRegistersSSE) /
+                              sizeof(kUnavailableRegistersSSE[0]));
+
     return makeArrayRef(kUnavailableRegisters,
                         std::size(kUnavailableRegisters));
   }
@@ -772,6 +782,7 @@
   }
 
   static const unsigned kUnavailableRegisters[4];
+  static const unsigned kUnavailableRegistersSSE[12];
 };
 
 // We disable a few registers that cannot be encoded on instructions with a REX
@@ -779,6 +790,12 @@
 const unsigned ExegesisX86Target::kUnavailableRegisters[4] = {X86::AH, X86::BH,
                                                               X86::CH, X86::DH};
 
+// Optionally, also disable the upper (x86_64) SSE registers to reduce frontend
+// decoder load.
+const unsigned ExegesisX86Target::kUnavailableRegistersSSE[12] = {
+    X86::AH,    X86::BH,    X86::CH,    X86::DH,    X86::XMM8,  X86::XMM9,
+    X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15};
+
 // We're using one of R8-R15 because these registers are never hardcoded in
 // instructions (e.g. MOVS writes to EDI, ESI, EDX), so they have less
 // conflicts.
Index: llvm/docs/CommandGuide/llvm-exegesis.rst
===================================================================
--- llvm/docs/CommandGuide/llvm-exegesis.rst
+++ llvm/docs/CommandGuide/llvm-exegesis.rst
@@ -204,6 +204,15 @@
   could occur if the sampling is too frequent. A prime number should be used to
   avoid consistently skipping certain blocks.
 
+.. option:: -x86-disable-upper-sse-registers
+
+  Using the upper xmm regsiters (xmm8-xmm15) forces a longer instruction encoding
+  which may put greater pressure on the frontend instruct fetch and decode stages,
+  potentially reducing the rate that instructions are dispatched to the backend,
+  particularly on older hardware. Comparing baseline results with this mode
+  enabled can help determine the effects of the frontend and can be used to
+  improve latency and throughput estimates.
+
 .. option:: -repetition-mode=[duplicate|loop|min]
 
  Specify the repetition mode. `duplicate` will create a large, straight line


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