[PATCH] D138811: [AArch64] SelectionDag codegen for gpr CTZ instruction

[Sam Elliott via Phabricator via llvm-commits]

lenary added subscribers: paquette, RKSimon.
lenary added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:8499
+
+let Predicates = [HasCSSC] in {
+  def : Pat<(i32 (ctlz (bitreverse GPR32:$Rn))),
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stuij wrote:
> There's a question here if we should move these into dagcombiner and implement likewise for GlobalIsel, or if we should leave this here and have them be picked up by SelDag and GlobalIsel:
We've talked already and my position is that these should be in dagcombiner/globalisel combines, but I'm interested in the views of e.g. @paquette @RKSimon. I realise combines like this might have to be behind hooks given that on some targets, cttz/ctlz of zero is undefined.


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Comment at: llvm/test/CodeGen/AArch64/gpr_cttz.ll:146
+define i64 @cttz64combine(i64 %x) nounwind readnone {
+  %rev = tail call i64 @llvm.bitreverse.i64(i64 %x)
+  %ctz = tail call i64 @llvm.ctlz.i64(i64 %rev)
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how does this testcase have no CHECK lines?


Repository:
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  https://reviews.llvm.org/D138811/new/

https://reviews.llvm.org/D138811