[PATCH] D138812: [AArch64] lower abs intrinsic to new ABS instruction in SelDag

[Ties Stuij via Phabricator via llvm-commits]

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When feature CSSC is available, the SelectionDag abs intrinsic should map to the
new scalar ABS instruction.

Additionally, the SIMDTwoScalarD tablegen defm includes a pattern match for
scalar i64, which we don't want to use when CSSC is enabled.

spec:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/ABS--Absolute-value-


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138812

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/iabs.ll

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