[PATCH] D138700: [InstSimplify] Fold two i1 select patterns

chenglin.bi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 27 04:02:38 PST 2022


bcl5980 added a comment.

Note:
`!(X || Y) && Y --> false`
will be trigged on `SpecCPU2017\benchspec\CPU\502.gcc_r\src\insn-attrtab.c`


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138700/new/

https://reviews.llvm.org/D138700



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