[PATCH] D138639: [X86] Add In64BitMode for MOVSX64/MOVZX64 instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D138639#3948601 <https://reviews.llvm.org/D138639#3948601>, @HaohaiWen wrote:

>> Are you seeing a functional issue that this fixes?
>
> I'm fixing a AlderlakeP schedmodel issue: https://github.com/llvm/llvm-project/issues/58792.
> To fix it, I need to use AsmMatcherEmitter to match CodeGenOnly but encodable instructions like CVTSD2SI64rm_Int.
> This trigged assertion in X86AsmParser::validateInstruction:
>
>   if (UsesRex && HReg != X86::NoRegister) {
>     StringRef RegName = X86IntelInstPrinter::getRegisterName(HReg);
>     return Error(Ops[0]->getStartLoc(),
>                  "can't encode '" + RegName + "' in an instruction requiring "
>                  "REX prefix");
>   }

How does adding In64BitMode avoid this error? This error occurs when AH/BH/CH/DH are passed to an instruction that uses a REX prefix. Are you using In64BitMode to avoid passing AH/BH/CH/DH registers?


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