[PATCH] D138570: [AArch64] Add patterns for SVE predicated add/sub and mov combine

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 24 05:18:09 PST 2022


paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:3137
+let Predicates = [HasSVE] in {
+  def : Pat<(nxv16i8 (add ZPR:$op, (zext (nxv16i1 PPR:$pred)))),
+            (ADD_ZPmZ_B PPR:$pred, ZPR:$op, (DUP_ZI_B 1, 0))>;
----------------
NicolaLancellotti wrote:
> paulwalker-arm wrote:
> > Given the previous work that did land, do these patterns ever match? I mean we shouldn't have any `zext` of predicate vectors by this point should we? Or do you plan to revert that patch once this lands.
> > Given the previous work that did land, do these patterns ever match? I mean we shouldn't have any `zext` of predicate vectors by this point should we? Or do you plan to revert that patch once this lands.
> 
> These zext patterns are added in case we want to revert the "Canonicalize ZERO_EXTEND to VSELECT" patch, otherwise, we don't need them.
There's never a good reason to add unused patterns so you should pick one way or the other.  For what it's worth I think consistency is best so if the isel patterns work best for sext and there's no downside to using them for zext then I'd prefer to revert the original work once this patch lands.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138570/new/

https://reviews.llvm.org/D138570



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