[llvm] 10eda33 - [AArch64][SME]: Generate streaming-compatible code for int-minmax, fp-minmax
Hassnaa Hamdi via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 23 08:13:49 PST 2022
Author: Hassnaa Hamdi
Date: 2022-11-23T15:49:16Z
New Revision: 10eda33a5f15a55eafcf8db36efe5d7eb6a97fa1
URL: https://github.com/llvm/llvm-project/commit/10eda33a5f15a55eafcf8db36efe5d7eb6a97fa1
DIFF: https://github.com/llvm/llvm-project/commit/10eda33a5f15a55eafcf8db36efe5d7eb6a97fa1.diff
LOG: [AArch64][SME]: Generate streaming-compatible code for int-minmax, fp-minmax
1-To generate code compatible to streaming mode:
- enable custom lowering for SMIN, SMAX, UMIN, UMAX,
FMAXNUM, FMINNUM, FMAXIMUM, FMINIMUM.
2-Testing files:
- int-minmax.ll
- fp-minmax.ll
Reviewed By: david-arm, sdesmalen
Differential Revision: https://reviews.llvm.org/D138292
Added:
Modified:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-minmax.ll
llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-minmax.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 6fca41fe7124..8a9f7cf47f76 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -1635,6 +1635,14 @@ void AArch64TargetLowering::addTypeForStreamingSVE(MVT VT) {
setOperationAction(ISD::FSQRT, VT, Custom);
setOperationAction(ISD::FSUB, VT, Custom);
setOperationAction(ISD::FABS, VT, Custom);
+ setOperationAction(ISD::SMIN, VT, Custom);
+ setOperationAction(ISD::SMAX, VT, Custom);
+ setOperationAction(ISD::UMIN, VT, Custom);
+ setOperationAction(ISD::UMAX, VT, Custom);
+ setOperationAction(ISD::FMAXNUM, VT, Custom);
+ setOperationAction(ISD::FMINNUM, VT, Custom);
+ setOperationAction(ISD::FMAXIMUM, VT, Custom);
+ setOperationAction(ISD::FMINIMUM, VT, Custom);
}
void AArch64TargetLowering::addTypeForFixedLengthSVE(MVT VT) {
diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-minmax.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-minmax.ll
index e2094a0dcfb7..e244ccf19b50 100644
--- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-minmax.ll
+++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-minmax.ll
@@ -10,7 +10,11 @@ target triple = "aarch64-unknown-linux-gnu"
define <4 x half> @fmaxnm_v4f16(<4 x half> %op1, <4 x half> %op2) #0 {
; CHECK-LABEL: fmaxnm_v4f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x half> @llvm.maxnum.v4f16(<4 x half> %op1, <4 x half> %op2)
ret <4 x half> %res
@@ -19,7 +23,11 @@ define <4 x half> @fmaxnm_v4f16(<4 x half> %op1, <4 x half> %op2) #0 {
define <8 x half> @fmaxnm_v8f16(<8 x half> %op1, <8 x half> %op2) #0 {
; CHECK-LABEL: fmaxnm_v8f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl8
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x half> @llvm.maxnum.v8f16(<8 x half> %op1, <8 x half> %op2)
ret <8 x half> %res
@@ -29,9 +37,10 @@ define void @fmaxnm_v16f16(<16 x half>* %a, <16 x half>* %b) #0 {
; CHECK-LABEL: fmaxnm_v16f16:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.h, vl8
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fmaxnm v0.8h, v0.8h, v2.8h
-; CHECK-NEXT: fmaxnm v1.8h, v1.8h, v3.8h
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, z2.h
+; CHECK-NEXT: fmaxnm z1.h, p0/m, z1.h, z3.h
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <16 x half>, <16 x half>* %a
@@ -44,7 +53,11 @@ define void @fmaxnm_v16f16(<16 x half>* %a, <16 x half>* %b) #0 {
define <2 x float> @fmaxnm_v2f32(<2 x float> %op1, <2 x float> %op2) #0 {
; CHECK-LABEL: fmaxnm_v2f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmaxnm v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl2
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x float> @llvm.maxnum.v2f32(<2 x float> %op1, <2 x float> %op2)
ret <2 x float> %res
@@ -53,7 +66,11 @@ define <2 x float> @fmaxnm_v2f32(<2 x float> %op1, <2 x float> %op2) #0 {
define <4 x float> @fmaxnm_v4f32(<4 x float> %op1, <4 x float> %op2) #0 {
; CHECK-LABEL: fmaxnm_v4f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl4
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %op1, <4 x float> %op2)
ret <4 x float> %res
@@ -63,9 +80,10 @@ define void @fmaxnm_v8f32(<8 x float>* %a, <8 x float>* %b) #0 {
; CHECK-LABEL: fmaxnm_v8f32:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.s, vl4
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fmaxnm v0.4s, v0.4s, v2.4s
-; CHECK-NEXT: fmaxnm v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, z2.s
+; CHECK-NEXT: fmaxnm z1.s, p0/m, z1.s, z3.s
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <8 x float>, <8 x float>* %a
@@ -89,7 +107,11 @@ define <1 x double> @fmaxnm_v1f64(<1 x double> %op1, <1 x double> %op2) #0 {
define <2 x double> @fmaxnm_v2f64(<2 x double> %op1, <2 x double> %op2) #0 {
; CHECK-LABEL: fmaxnm_v2f64:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmaxnm v0.2d, v0.2d, v1.2d
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.d, vl2
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, z1.d
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x double> @llvm.maxnum.v2f64(<2 x double> %op1, <2 x double> %op2)
ret <2 x double> %res
@@ -99,9 +121,10 @@ define void @fmaxnm_v4f64(<4 x double>* %a, <4 x double>* %b) #0 {
; CHECK-LABEL: fmaxnm_v4f64:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.d, vl2
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fmaxnm v0.2d, v0.2d, v2.2d
-; CHECK-NEXT: fmaxnm v1.2d, v1.2d, v3.2d
+; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, z2.d
+; CHECK-NEXT: fmaxnm z1.d, p0/m, z1.d, z3.d
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <4 x double>, <4 x double>* %a
@@ -118,7 +141,11 @@ define void @fmaxnm_v4f64(<4 x double>* %a, <4 x double>* %b) #0 {
define <4 x half> @fminnm_v4f16(<4 x half> %op1, <4 x half> %op2) #0 {
; CHECK-LABEL: fminnm_v4f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: fminnm v0.4h, v0.4h, v1.4h
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x half> @llvm.minnum.v4f16(<4 x half> %op1, <4 x half> %op2)
ret <4 x half> %res
@@ -127,7 +154,11 @@ define <4 x half> @fminnm_v4f16(<4 x half> %op1, <4 x half> %op2) #0 {
define <8 x half> @fminnm_v8f16(<8 x half> %op1, <8 x half> %op2) #0 {
; CHECK-LABEL: fminnm_v8f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: fminnm v0.8h, v0.8h, v1.8h
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl8
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x half> @llvm.minnum.v8f16(<8 x half> %op1, <8 x half> %op2)
ret <8 x half> %res
@@ -137,9 +168,10 @@ define void @fminnm_v16f16(<16 x half>* %a, <16 x half>* %b) #0 {
; CHECK-LABEL: fminnm_v16f16:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.h, vl8
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fminnm v0.8h, v0.8h, v2.8h
-; CHECK-NEXT: fminnm v1.8h, v1.8h, v3.8h
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, z2.h
+; CHECK-NEXT: fminnm z1.h, p0/m, z1.h, z3.h
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <16 x half>, <16 x half>* %a
@@ -152,7 +184,11 @@ define void @fminnm_v16f16(<16 x half>* %a, <16 x half>* %b) #0 {
define <2 x float> @fminnm_v2f32(<2 x float> %op1, <2 x float> %op2) #0 {
; CHECK-LABEL: fminnm_v2f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: fminnm v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl2
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x float> @llvm.minnum.v2f32(<2 x float> %op1, <2 x float> %op2)
ret <2 x float> %res
@@ -161,7 +197,11 @@ define <2 x float> @fminnm_v2f32(<2 x float> %op1, <2 x float> %op2) #0 {
define <4 x float> @fminnm_v4f32(<4 x float> %op1, <4 x float> %op2) #0 {
; CHECK-LABEL: fminnm_v4f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: fminnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl4
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x float> @llvm.minnum.v4f32(<4 x float> %op1, <4 x float> %op2)
ret <4 x float> %res
@@ -171,9 +211,10 @@ define void @fminnm_v8f32(<8 x float>* %a, <8 x float>* %b) #0 {
; CHECK-LABEL: fminnm_v8f32:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.s, vl4
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fminnm v0.4s, v0.4s, v2.4s
-; CHECK-NEXT: fminnm v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, z2.s
+; CHECK-NEXT: fminnm z1.s, p0/m, z1.s, z3.s
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <8 x float>, <8 x float>* %a
@@ -197,7 +238,11 @@ define <1 x double> @fminnm_v1f64(<1 x double> %op1, <1 x double> %op2) #0 {
define <2 x double> @fminnm_v2f64(<2 x double> %op1, <2 x double> %op2) #0 {
; CHECK-LABEL: fminnm_v2f64:
; CHECK: // %bb.0:
-; CHECK-NEXT: fminnm v0.2d, v0.2d, v1.2d
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.d, vl2
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, z1.d
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x double> @llvm.minnum.v2f64(<2 x double> %op1, <2 x double> %op2)
ret <2 x double> %res
@@ -207,9 +252,10 @@ define void @fminnm_v4f64(<4 x double>* %a, <4 x double>* %b) #0 {
; CHECK-LABEL: fminnm_v4f64:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.d, vl2
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fminnm v0.2d, v0.2d, v2.2d
-; CHECK-NEXT: fminnm v1.2d, v1.2d, v3.2d
+; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, z2.d
+; CHECK-NEXT: fminnm z1.d, p0/m, z1.d, z3.d
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <4 x double>, <4 x double>* %a
@@ -226,7 +272,11 @@ define void @fminnm_v4f64(<4 x double>* %a, <4 x double>* %b) #0 {
define <4 x half> @fmax_v4f16(<4 x half> %op1, <4 x half> %op2) #0 {
; CHECK-LABEL: fmax_v4f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmax v0.4h, v0.4h, v1.4h
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x half> @llvm.maximum.v4f16(<4 x half> %op1, <4 x half> %op2)
ret <4 x half> %res
@@ -235,7 +285,11 @@ define <4 x half> @fmax_v4f16(<4 x half> %op1, <4 x half> %op2) #0 {
define <8 x half> @fmax_v8f16(<8 x half> %op1, <8 x half> %op2) #0 {
; CHECK-LABEL: fmax_v8f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmax v0.8h, v0.8h, v1.8h
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl8
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x half> @llvm.maximum.v8f16(<8 x half> %op1, <8 x half> %op2)
ret <8 x half> %res
@@ -245,9 +299,10 @@ define void @fmax_v16f16(<16 x half>* %a, <16 x half>* %b) #0 {
; CHECK-LABEL: fmax_v16f16:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.h, vl8
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fmax v0.8h, v0.8h, v2.8h
-; CHECK-NEXT: fmax v1.8h, v1.8h, v3.8h
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, z2.h
+; CHECK-NEXT: fmax z1.h, p0/m, z1.h, z3.h
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <16 x half>, <16 x half>* %a
@@ -260,7 +315,11 @@ define void @fmax_v16f16(<16 x half>* %a, <16 x half>* %b) #0 {
define <2 x float> @fmax_v2f32(<2 x float> %op1, <2 x float> %op2) #0 {
; CHECK-LABEL: fmax_v2f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmax v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl2
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x float> @llvm.maximum.v2f32(<2 x float> %op1, <2 x float> %op2)
ret <2 x float> %res
@@ -269,7 +328,11 @@ define <2 x float> @fmax_v2f32(<2 x float> %op1, <2 x float> %op2) #0 {
define <4 x float> @fmax_v4f32(<4 x float> %op1, <4 x float> %op2) #0 {
; CHECK-LABEL: fmax_v4f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmax v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl4
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x float> @llvm.maximum.v4f32(<4 x float> %op1, <4 x float> %op2)
ret <4 x float> %res
@@ -279,9 +342,10 @@ define void @fmax_v8f32(<8 x float>* %a, <8 x float>* %b) #0 {
; CHECK-LABEL: fmax_v8f32:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.s, vl4
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fmax v0.4s, v0.4s, v2.4s
-; CHECK-NEXT: fmax v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, z2.s
+; CHECK-NEXT: fmax z1.s, p0/m, z1.s, z3.s
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <8 x float>, <8 x float>* %a
@@ -305,7 +369,11 @@ define <1 x double> @fmax_v1f64(<1 x double> %op1, <1 x double> %op2) #0 {
define <2 x double> @fmax_v2f64(<2 x double> %op1, <2 x double> %op2) #0 {
; CHECK-LABEL: fmax_v2f64:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmax v0.2d, v0.2d, v1.2d
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.d, vl2
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fmax z0.d, p0/m, z0.d, z1.d
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x double> @llvm.maximum.v2f64(<2 x double> %op1, <2 x double> %op2)
ret <2 x double> %res
@@ -315,9 +383,10 @@ define void @fmax_v4f64(<4 x double>* %a, <4 x double>* %b) #0 {
; CHECK-LABEL: fmax_v4f64:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.d, vl2
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fmax v0.2d, v0.2d, v2.2d
-; CHECK-NEXT: fmax v1.2d, v1.2d, v3.2d
+; CHECK-NEXT: fmax z0.d, p0/m, z0.d, z2.d
+; CHECK-NEXT: fmax z1.d, p0/m, z1.d, z3.d
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <4 x double>, <4 x double>* %a
@@ -334,7 +403,11 @@ define void @fmax_v4f64(<4 x double>* %a, <4 x double>* %b) #0 {
define <4 x half> @fmin_v4f16(<4 x half> %op1, <4 x half> %op2) #0 {
; CHECK-LABEL: fmin_v4f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmin v0.4h, v0.4h, v1.4h
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x half> @llvm.minimum.v4f16(<4 x half> %op1, <4 x half> %op2)
ret <4 x half> %res
@@ -343,7 +416,11 @@ define <4 x half> @fmin_v4f16(<4 x half> %op1, <4 x half> %op2) #0 {
define <8 x half> @fmin_v8f16(<8 x half> %op1, <8 x half> %op2) #0 {
; CHECK-LABEL: fmin_v8f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmin v0.8h, v0.8h, v1.8h
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl8
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x half> @llvm.minimum.v8f16(<8 x half> %op1, <8 x half> %op2)
ret <8 x half> %res
@@ -353,9 +430,10 @@ define void @fmin_v16f16(<16 x half>* %a, <16 x half>* %b) #0 {
; CHECK-LABEL: fmin_v16f16:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.h, vl8
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fmin v0.8h, v0.8h, v2.8h
-; CHECK-NEXT: fmin v1.8h, v1.8h, v3.8h
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, z2.h
+; CHECK-NEXT: fmin z1.h, p0/m, z1.h, z3.h
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <16 x half>, <16 x half>* %a
@@ -368,7 +446,11 @@ define void @fmin_v16f16(<16 x half>* %a, <16 x half>* %b) #0 {
define <2 x float> @fmin_v2f32(<2 x float> %op1, <2 x float> %op2) #0 {
; CHECK-LABEL: fmin_v2f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmin v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl2
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x float> @llvm.minimum.v2f32(<2 x float> %op1, <2 x float> %op2)
ret <2 x float> %res
@@ -377,7 +459,11 @@ define <2 x float> @fmin_v2f32(<2 x float> %op1, <2 x float> %op2) #0 {
define <4 x float> @fmin_v4f32(<4 x float> %op1, <4 x float> %op2) #0 {
; CHECK-LABEL: fmin_v4f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmin v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl4
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x float> @llvm.minimum.v4f32(<4 x float> %op1, <4 x float> %op2)
ret <4 x float> %res
@@ -387,9 +473,10 @@ define void @fmin_v8f32(<8 x float>* %a, <8 x float>* %b) #0 {
; CHECK-LABEL: fmin_v8f32:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.s, vl4
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fmin v0.4s, v0.4s, v2.4s
-; CHECK-NEXT: fmin v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, z2.s
+; CHECK-NEXT: fmin z1.s, p0/m, z1.s, z3.s
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <8 x float>, <8 x float>* %a
@@ -413,7 +500,11 @@ define <1 x double> @fmin_v1f64(<1 x double> %op1, <1 x double> %op2) #0 {
define <2 x double> @fmin_v2f64(<2 x double> %op1, <2 x double> %op2) #0 {
; CHECK-LABEL: fmin_v2f64:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmin v0.2d, v0.2d, v1.2d
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.d, vl2
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: fmin z0.d, p0/m, z0.d, z1.d
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x double> @llvm.minimum.v2f64(<2 x double> %op1, <2 x double> %op2)
ret <2 x double> %res
@@ -423,9 +514,10 @@ define void @fmin_v4f64(<4 x double>* %a, <4 x double>* %b) #0 {
; CHECK-LABEL: fmin_v4f64:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.d, vl2
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: fmin v0.2d, v0.2d, v2.2d
-; CHECK-NEXT: fmin v1.2d, v1.2d, v3.2d
+; CHECK-NEXT: fmin z0.d, p0/m, z0.d, z2.d
+; CHECK-NEXT: fmin z1.d, p0/m, z1.d, z3.d
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <4 x double>, <4 x double>* %a
diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-minmax.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-minmax.ll
index 691b812fe53b..96b7b8066be1 100644
--- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-minmax.ll
+++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-minmax.ll
@@ -10,7 +10,11 @@ target triple = "aarch64-unknown-linux-gnu"
define <8 x i8> @smax_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
; CHECK-LABEL: smax_v8i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: smax v0.8b, v0.8b, v1.8b
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.b, vl8
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: smax z0.b, p0/m, z0.b, z1.b
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x i8> @llvm.smax.v8i8(<8 x i8> %op1, <8 x i8> %op2)
ret <8 x i8> %res
@@ -19,7 +23,11 @@ define <8 x i8> @smax_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
define <16 x i8> @smax_v16i8(<16 x i8> %op1, <16 x i8> %op2) #0 {
; CHECK-LABEL: smax_v16i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: smax v0.16b, v0.16b, v1.16b
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.b, vl16
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: smax z0.b, p0/m, z0.b, z1.b
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %op1, <16 x i8> %op2)
ret <16 x i8> %res
@@ -29,9 +37,10 @@ define void @smax_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
; CHECK-LABEL: smax_v32i8:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.b, vl16
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: smax v0.16b, v0.16b, v2.16b
-; CHECK-NEXT: smax v1.16b, v1.16b, v3.16b
+; CHECK-NEXT: smax z0.b, p0/m, z0.b, z2.b
+; CHECK-NEXT: smax z1.b, p0/m, z1.b, z3.b
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <32 x i8>, <32 x i8>* %a
@@ -44,7 +53,11 @@ define void @smax_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
define <4 x i16> @smax_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
; CHECK-LABEL: smax_v4i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: smax v0.4h, v0.4h, v1.4h
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: smax z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x i16> @llvm.smax.v4i16(<4 x i16> %op1, <4 x i16> %op2)
ret <4 x i16> %res
@@ -53,7 +66,11 @@ define <4 x i16> @smax_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
define <8 x i16> @smax_v8i16(<8 x i16> %op1, <8 x i16> %op2) #0 {
; CHECK-LABEL: smax_v8i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: smax v0.8h, v0.8h, v1.8h
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl8
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: smax z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x i16> @llvm.smax.v8i16(<8 x i16> %op1, <8 x i16> %op2)
ret <8 x i16> %res
@@ -63,9 +80,10 @@ define void @smax_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
; CHECK-LABEL: smax_v16i16:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.h, vl8
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: smax v0.8h, v0.8h, v2.8h
-; CHECK-NEXT: smax v1.8h, v1.8h, v3.8h
+; CHECK-NEXT: smax z0.h, p0/m, z0.h, z2.h
+; CHECK-NEXT: smax z1.h, p0/m, z1.h, z3.h
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <16 x i16>, <16 x i16>* %a
@@ -78,7 +96,11 @@ define void @smax_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
define <2 x i32> @smax_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
; CHECK-LABEL: smax_v2i32:
; CHECK: // %bb.0:
-; CHECK-NEXT: smax v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl2
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: smax z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x i32> @llvm.smax.v2i32(<2 x i32> %op1, <2 x i32> %op2)
ret <2 x i32> %res
@@ -87,7 +109,11 @@ define <2 x i32> @smax_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
define <4 x i32> @smax_v4i32(<4 x i32> %op1, <4 x i32> %op2) #0 {
; CHECK-LABEL: smax_v4i32:
; CHECK: // %bb.0:
-; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl4
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: smax z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %op1, <4 x i32> %op2)
ret <4 x i32> %res
@@ -97,9 +123,10 @@ define void @smax_v8i32(<8 x i32>* %a, <8 x i32>* %b) #0 {
; CHECK-LABEL: smax_v8i32:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.s, vl4
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: smax v0.4s, v0.4s, v2.4s
-; CHECK-NEXT: smax v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: smax z0.s, p0/m, z0.s, z2.s
+; CHECK-NEXT: smax z1.s, p0/m, z1.s, z3.s
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <8 x i32>, <8 x i32>* %a
@@ -161,7 +188,11 @@ define void @smax_v4i64(<4 x i64>* %a, <4 x i64>* %b) #0 {
define <8 x i8> @smin_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
; CHECK-LABEL: smin_v8i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: smin v0.8b, v0.8b, v1.8b
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.b, vl8
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: smin z0.b, p0/m, z0.b, z1.b
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x i8> @llvm.smin.v8i8(<8 x i8> %op1, <8 x i8> %op2)
ret <8 x i8> %res
@@ -170,7 +201,11 @@ define <8 x i8> @smin_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
define <16 x i8> @smin_v16i8(<16 x i8> %op1, <16 x i8> %op2) #0 {
; CHECK-LABEL: smin_v16i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: smin v0.16b, v0.16b, v1.16b
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.b, vl16
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: smin z0.b, p0/m, z0.b, z1.b
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <16 x i8> @llvm.smin.v16i8(<16 x i8> %op1, <16 x i8> %op2)
ret <16 x i8> %res
@@ -180,9 +215,10 @@ define void @smin_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
; CHECK-LABEL: smin_v32i8:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.b, vl16
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: smin v0.16b, v0.16b, v2.16b
-; CHECK-NEXT: smin v1.16b, v1.16b, v3.16b
+; CHECK-NEXT: smin z0.b, p0/m, z0.b, z2.b
+; CHECK-NEXT: smin z1.b, p0/m, z1.b, z3.b
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <32 x i8>, <32 x i8>* %a
@@ -195,7 +231,11 @@ define void @smin_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
define <4 x i16> @smin_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
; CHECK-LABEL: smin_v4i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: smin v0.4h, v0.4h, v1.4h
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: smin z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x i16> @llvm.smin.v4i16(<4 x i16> %op1, <4 x i16> %op2)
ret <4 x i16> %res
@@ -204,7 +244,11 @@ define <4 x i16> @smin_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
define <8 x i16> @smin_v8i16(<8 x i16> %op1, <8 x i16> %op2) #0 {
; CHECK-LABEL: smin_v8i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: smin v0.8h, v0.8h, v1.8h
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl8
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: smin z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x i16> @llvm.smin.v8i16(<8 x i16> %op1, <8 x i16> %op2)
ret <8 x i16> %res
@@ -214,9 +258,10 @@ define void @smin_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
; CHECK-LABEL: smin_v16i16:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.h, vl8
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: smin v0.8h, v0.8h, v2.8h
-; CHECK-NEXT: smin v1.8h, v1.8h, v3.8h
+; CHECK-NEXT: smin z0.h, p0/m, z0.h, z2.h
+; CHECK-NEXT: smin z1.h, p0/m, z1.h, z3.h
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <16 x i16>, <16 x i16>* %a
@@ -229,7 +274,11 @@ define void @smin_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
define <2 x i32> @smin_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
; CHECK-LABEL: smin_v2i32:
; CHECK: // %bb.0:
-; CHECK-NEXT: smin v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl2
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: smin z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x i32> @llvm.smin.v2i32(<2 x i32> %op1, <2 x i32> %op2)
ret <2 x i32> %res
@@ -238,7 +287,11 @@ define <2 x i32> @smin_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
define <4 x i32> @smin_v4i32(<4 x i32> %op1, <4 x i32> %op2) #0 {
; CHECK-LABEL: smin_v4i32:
; CHECK: // %bb.0:
-; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl4
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: smin z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %op1, <4 x i32> %op2)
ret <4 x i32> %res
@@ -248,9 +301,10 @@ define void @smin_v8i32(<8 x i32>* %a, <8 x i32>* %b) #0 {
; CHECK-LABEL: smin_v8i32:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.s, vl4
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: smin v0.4s, v0.4s, v2.4s
-; CHECK-NEXT: smin v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: smin z0.s, p0/m, z0.s, z2.s
+; CHECK-NEXT: smin z1.s, p0/m, z1.s, z3.s
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <8 x i32>, <8 x i32>* %a
@@ -312,7 +366,11 @@ define void @smin_v4i64(<4 x i64>* %a, <4 x i64>* %b) #0 {
define <8 x i8> @umax_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
; CHECK-LABEL: umax_v8i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: umax v0.8b, v0.8b, v1.8b
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.b, vl8
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: umax z0.b, p0/m, z0.b, z1.b
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x i8> @llvm.umax.v8i8(<8 x i8> %op1, <8 x i8> %op2)
ret <8 x i8> %res
@@ -321,7 +379,11 @@ define <8 x i8> @umax_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
define <16 x i8> @umax_v16i8(<16 x i8> %op1, <16 x i8> %op2) #0 {
; CHECK-LABEL: umax_v16i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: umax v0.16b, v0.16b, v1.16b
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.b, vl16
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: umax z0.b, p0/m, z0.b, z1.b
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <16 x i8> @llvm.umax.v16i8(<16 x i8> %op1, <16 x i8> %op2)
ret <16 x i8> %res
@@ -331,9 +393,10 @@ define void @umax_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
; CHECK-LABEL: umax_v32i8:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.b, vl16
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: umax v0.16b, v0.16b, v2.16b
-; CHECK-NEXT: umax v1.16b, v1.16b, v3.16b
+; CHECK-NEXT: umax z0.b, p0/m, z0.b, z2.b
+; CHECK-NEXT: umax z1.b, p0/m, z1.b, z3.b
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <32 x i8>, <32 x i8>* %a
@@ -346,7 +409,11 @@ define void @umax_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
define <4 x i16> @umax_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
; CHECK-LABEL: umax_v4i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: umax v0.4h, v0.4h, v1.4h
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: umax z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x i16> @llvm.umax.v4i16(<4 x i16> %op1, <4 x i16> %op2)
ret <4 x i16> %res
@@ -355,7 +422,11 @@ define <4 x i16> @umax_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
define <8 x i16> @umax_v8i16(<8 x i16> %op1, <8 x i16> %op2) #0 {
; CHECK-LABEL: umax_v8i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: umax v0.8h, v0.8h, v1.8h
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl8
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: umax z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x i16> @llvm.umax.v8i16(<8 x i16> %op1, <8 x i16> %op2)
ret <8 x i16> %res
@@ -365,9 +436,10 @@ define void @umax_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
; CHECK-LABEL: umax_v16i16:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.h, vl8
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: umax v0.8h, v0.8h, v2.8h
-; CHECK-NEXT: umax v1.8h, v1.8h, v3.8h
+; CHECK-NEXT: umax z0.h, p0/m, z0.h, z2.h
+; CHECK-NEXT: umax z1.h, p0/m, z1.h, z3.h
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <16 x i16>, <16 x i16>* %a
@@ -380,7 +452,11 @@ define void @umax_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
define <2 x i32> @umax_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
; CHECK-LABEL: umax_v2i32:
; CHECK: // %bb.0:
-; CHECK-NEXT: umax v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl2
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: umax z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x i32> @llvm.umax.v2i32(<2 x i32> %op1, <2 x i32> %op2)
ret <2 x i32> %res
@@ -389,7 +465,11 @@ define <2 x i32> @umax_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
define <4 x i32> @umax_v4i32(<4 x i32> %op1, <4 x i32> %op2) #0 {
; CHECK-LABEL: umax_v4i32:
; CHECK: // %bb.0:
-; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl4
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: umax z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x i32> @llvm.umax.v4i32(<4 x i32> %op1, <4 x i32> %op2)
ret <4 x i32> %res
@@ -399,9 +479,10 @@ define void @umax_v8i32(<8 x i32>* %a, <8 x i32>* %b) #0 {
; CHECK-LABEL: umax_v8i32:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.s, vl4
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: umax v0.4s, v0.4s, v2.4s
-; CHECK-NEXT: umax v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: umax z0.s, p0/m, z0.s, z2.s
+; CHECK-NEXT: umax z1.s, p0/m, z1.s, z3.s
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <8 x i32>, <8 x i32>* %a
@@ -463,7 +544,11 @@ define void @umax_v4i64(<4 x i64>* %a, <4 x i64>* %b) #0 {
define <8 x i8> @umin_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
; CHECK-LABEL: umin_v8i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: umin v0.8b, v0.8b, v1.8b
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.b, vl8
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: umin z0.b, p0/m, z0.b, z1.b
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x i8> @llvm.umin.v8i8(<8 x i8> %op1, <8 x i8> %op2)
ret <8 x i8> %res
@@ -472,7 +557,11 @@ define <8 x i8> @umin_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
define <16 x i8> @umin_v16i8(<16 x i8> %op1, <16 x i8> %op2) #0 {
; CHECK-LABEL: umin_v16i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: umin v0.16b, v0.16b, v1.16b
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.b, vl16
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: umin z0.b, p0/m, z0.b, z1.b
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <16 x i8> @llvm.umin.v16i8(<16 x i8> %op1, <16 x i8> %op2)
ret <16 x i8> %res
@@ -482,9 +571,10 @@ define void @umin_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
; CHECK-LABEL: umin_v32i8:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.b, vl16
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: umin v0.16b, v0.16b, v2.16b
-; CHECK-NEXT: umin v1.16b, v1.16b, v3.16b
+; CHECK-NEXT: umin z0.b, p0/m, z0.b, z2.b
+; CHECK-NEXT: umin z1.b, p0/m, z1.b, z3.b
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <32 x i8>, <32 x i8>* %a
@@ -497,7 +587,11 @@ define void @umin_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
define <4 x i16> @umin_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
; CHECK-LABEL: umin_v4i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: umin v0.4h, v0.4h, v1.4h
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: umin z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x i16> @llvm.umin.v4i16(<4 x i16> %op1, <4 x i16> %op2)
ret <4 x i16> %res
@@ -506,7 +600,11 @@ define <4 x i16> @umin_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
define <8 x i16> @umin_v8i16(<8 x i16> %op1, <8 x i16> %op2) #0 {
; CHECK-LABEL: umin_v8i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: umin v0.8h, v0.8h, v1.8h
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.h, vl8
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: umin z0.h, p0/m, z0.h, z1.h
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <8 x i16> @llvm.umin.v8i16(<8 x i16> %op1, <8 x i16> %op2)
ret <8 x i16> %res
@@ -516,9 +614,10 @@ define void @umin_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
; CHECK-LABEL: umin_v16i16:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.h, vl8
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: umin v0.8h, v0.8h, v2.8h
-; CHECK-NEXT: umin v1.8h, v1.8h, v3.8h
+; CHECK-NEXT: umin z0.h, p0/m, z0.h, z2.h
+; CHECK-NEXT: umin z1.h, p0/m, z1.h, z3.h
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <16 x i16>, <16 x i16>* %a
@@ -531,7 +630,11 @@ define void @umin_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
define <2 x i32> @umin_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
; CHECK-LABEL: umin_v2i32:
; CHECK: // %bb.0:
-; CHECK-NEXT: umin v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl2
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
+; CHECK-NEXT: umin z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
%res = call <2 x i32> @llvm.umin.v2i32(<2 x i32> %op1, <2 x i32> %op2)
ret <2 x i32> %res
@@ -540,7 +643,11 @@ define <2 x i32> @umin_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
define <4 x i32> @umin_v4i32(<4 x i32> %op1, <4 x i32> %op2) #0 {
; CHECK-LABEL: umin_v4i32:
; CHECK: // %bb.0:
-; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
+; CHECK-NEXT: ptrue p0.s, vl4
+; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
+; CHECK-NEXT: umin z0.s, p0/m, z0.s, z1.s
+; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
%res = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %op1, <4 x i32> %op2)
ret <4 x i32> %res
@@ -550,9 +657,10 @@ define void @umin_v8i32(<8 x i32>* %a, <8 x i32>* %b) #0 {
; CHECK-LABEL: umin_v8i32:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
+; CHECK-NEXT: ptrue p0.s, vl4
; CHECK-NEXT: ldp q2, q3, [x1]
-; CHECK-NEXT: umin v0.4s, v0.4s, v2.4s
-; CHECK-NEXT: umin v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: umin z0.s, p0/m, z0.s, z2.s
+; CHECK-NEXT: umin z1.s, p0/m, z1.s, z3.s
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
%op1 = load <8 x i32>, <8 x i32>* %a
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