[llvm] 375323f - [PowerPC] store the LR before stack update for big offsets.

[Chen Zheng via llvm-commits]

Author: Chen Zheng
Date: 2022-11-22T07:25:28Z
New Revision: 375323fb850a0e23df666641f93231fc28ce40ca

URL: https://github.com/llvm/llvm-project/commit/375323fb850a0e23df666641f93231fc28ce40ca
DIFF: https://github.com/llvm/llvm-project/commit/375323fb850a0e23df666641f93231fc28ce40ca.diff

LOG: [PowerPC] store the LR before stack update for big offsets.

For case that LROffset + FrameSize can not be encoded to the LR
store instruction, we have to store the LR before the stack update.

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
    llvm/test/CodeGen/PowerPC/mflr-store.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
index 1f17e9282404b..316559ca8bc0d 100644
--- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -904,7 +904,10 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
   // If we use STUX to update the stack pointer, we need the two scratch
   // registers TempReg and ScratchReg, we have to save LR here which is stored
   // in ScratchReg.
-  if (HasSTUX && MustSaveLR && !HasFastMFLR)
+  // If the offset can not be encoded into the store instruction, we also have
+  // to save LR here.
+  if (MustSaveLR && !HasFastMFLR &&
+      (HasSTUX || !isInt<16>(FrameSize + LROffset)))
     SaveLR(LROffset);
 
   // If FrameSize <= TLI.getStackProbeSize(MF), as POWER ABI requires backchain
@@ -1095,7 +1098,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
   }
 
   // Save the LR now.
-  if (!HasSTUX && MustSaveLR && !HasFastMFLR)
+  if (!HasSTUX && MustSaveLR && !HasFastMFLR && isInt<16>(FrameSize + LROffset))
     SaveLR(LROffset + FrameSize);
 
   // Add Call Frame Information for the instructions we generated above.

diff  --git a/llvm/test/CodeGen/PowerPC/mflr-store.mir b/llvm/test/CodeGen/PowerPC/mflr-store.mir
index 916a430ca2ad5..75c313617c883 100644
--- a/llvm/test/CodeGen/PowerPC/mflr-store.mir
+++ b/llvm/test/CodeGen/PowerPC/mflr-store.mir
@@ -25,8 +25,8 @@ body: |
   bb.0:
     ; CHECK-LABEL: name: test
     ; CHECK: $x0 = MFLR8 implicit $lr8
+    ; CHECK-NEXT: STD killed $x0, 16, $x1
     ; CHECK-NEXT: $x1 = STDU $x1, -32752, $x1
-    ; CHECK-NEXT: STD killed $x0, 32768, $x1
     ; CHECK-NEXT: BL8 @test_callee, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x2, implicit-def $r1, implicit-def $x3
     ; CHECK-NEXT: $x1 = ADDI8 $x1, 32752
     ; CHECK-NEXT: $x0 = LD 16, $x1