[llvm] 2aa8a1a - [PowerPC][NFC] add test case for mflr store fix

[Chen Zheng via llvm-commits]

Author: Chen Zheng
Date: 2022-11-22T07:25:23Z
New Revision: 2aa8a1a3bd1c4d58841d2edc1d733f07c11305a5

URL: https://github.com/llvm/llvm-project/commit/2aa8a1a3bd1c4d58841d2edc1d733f07c11305a5
DIFF: https://github.com/llvm/llvm-project/commit/2aa8a1a3bd1c4d58841d2edc1d733f07c11305a5.diff

LOG: [PowerPC][NFC] add test case for mflr store fix

Added: 
    llvm/test/CodeGen/PowerPC/mflr-store.mir

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/PowerPC/mflr-store.mir b/llvm/test/CodeGen/PowerPC/mflr-store.mir
new file mode 100644
index 0000000000000..916a430ca2ad5
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/mflr-store.mir
@@ -0,0 +1,38 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple powerpc64-unknown-aix-xcoff -x mir \
+# RUN: -stop-after=prologepilog --verify-machineinstrs < %s | \
+# RUN: FileCheck %s --check-prefixes=CHECK
+
+---
+name:            test_callee
+frameInfo:
+  hasCalls:        true
+tracksRegLiveness: true
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_callee
+    ; CHECK: $x3 = LI8 10
+    ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3
+    $x3 = LI8 10
+    BLR8 implicit $lr8, implicit $rm, implicit killed $x3
+...
+---
+name:            test
+tracksRegLiveness: true
+stack:
+  - { id: 0, size: 32704, alignment: 8 }
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test
+    ; CHECK: $x0 = MFLR8 implicit $lr8
+    ; CHECK-NEXT: $x1 = STDU $x1, -32752, $x1
+    ; CHECK-NEXT: STD killed $x0, 32768, $x1
+    ; CHECK-NEXT: BL8 @test_callee, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x2, implicit-def $r1, implicit-def $x3
+    ; CHECK-NEXT: $x1 = ADDI8 $x1, 32752
+    ; CHECK-NEXT: $x0 = LD 16, $x1
+    ; CHECK-NEXT: MTLR8 $x0, implicit-def $lr8
+    ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3
+    BL8 @test_callee, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x2, implicit-def $r1, implicit-def $x3
+    BLR8 implicit $lr8, implicit $rm, implicit $x3
+...
+