[llvm] f99514a - [RISCV] Remove SExtWRemovalCands set from RISCVSExtWRemoval.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 21 19:27:04 PST 2022


Author: Craig Topper
Date: 2022-11-21T19:24:02-08:00
New Revision: f99514ac3a6fbf8af619f45a93a22c81bb7f9e22

URL: https://github.com/llvm/llvm-project/commit/f99514ac3a6fbf8af619f45a93a22c81bb7f9e22
DIFF: https://github.com/llvm/llvm-project/commit/f99514ac3a6fbf8af619f45a93a22c81bb7f9e22.diff

LOG: [RISCV] Remove SExtWRemovalCands set from RISCVSExtWRemoval.

After D137970, we do the fixable instruction conversion in place
so we don't need to worry about iterator invalidation. This lets
us to conversion and updates in a single loop.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D138043

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp b/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
index 530918585bf9..b7b5c772d52e 100644
--- a/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
@@ -497,10 +497,8 @@ bool RISCVSExtWRemoval::runOnMachineFunction(MachineFunction &MF) {
   if (!ST.is64Bit())
     return false;
 
-  SmallPtrSet<MachineInstr *, 4> SExtWRemovalCands;
+  bool MadeChange = false;
 
-  // Replacing instructions invalidates the MI iterator
-  // we collect the candidates, then iterate over them separately.
   for (MachineBasicBlock &MBB : MF) {
     for (auto I = MBB.begin(), IE = MBB.end(); I != IE;) {
       MachineInstr *MI = &*I++;
@@ -514,41 +512,36 @@ bool RISCVSExtWRemoval::runOnMachineFunction(MachineFunction &MF) {
       if (!SrcReg.isVirtual())
         continue;
 
-      SExtWRemovalCands.insert(MI);
-    }
-  }
+      SmallPtrSet<MachineInstr *, 4> FixableDef;
+      MachineInstr &SrcMI = *MRI.getVRegDef(SrcReg);
 
-  bool MadeChange = false;
-  for (auto *MI : SExtWRemovalCands) {
-    SmallPtrSet<MachineInstr *, 4> FixableDef;
-    Register SrcReg = MI->getOperand(1).getReg();
-    MachineInstr &SrcMI = *MRI.getVRegDef(SrcReg);
-
-    // If all definitions reaching MI sign-extend their output,
-    // then sext.w is redundant
-    if (!isSignExtendedW(SrcMI, MRI, FixableDef))
-      continue;
+      // If all definitions reaching MI sign-extend their output,
+      // then sext.w is redundant
+      if (!isSignExtendedW(SrcMI, MRI, FixableDef))
+        continue;
 
-    Register DstReg = MI->getOperand(0).getReg();
-    if (!MRI.constrainRegClass(SrcReg, MRI.getRegClass(DstReg)))
-      continue;
-    // Convert Fixable instructions to their W versions.
-    for (MachineInstr *Fixable : FixableDef) {
-      LLVM_DEBUG(dbgs() << "Replacing " << *Fixable);
-      Fixable->setDesc(TII.get(getWOp(Fixable->getOpcode())));
-      Fixable->clearFlag(MachineInstr::MIFlag::NoSWrap);
-      Fixable->clearFlag(MachineInstr::MIFlag::NoUWrap);
-      Fixable->clearFlag(MachineInstr::MIFlag::IsExact);
-      LLVM_DEBUG(dbgs() << "     with " << *Fixable);
-      ++NumTransformedToWInstrs;
-    }
+      Register DstReg = MI->getOperand(0).getReg();
+      if (!MRI.constrainRegClass(SrcReg, MRI.getRegClass(DstReg)))
+        continue;
 
-    LLVM_DEBUG(dbgs() << "Removing redundant sign-extension\n");
-    MRI.replaceRegWith(DstReg, SrcReg);
-    MRI.clearKillFlags(SrcReg);
-    MI->eraseFromParent();
-    ++NumRemovedSExtW;
-    MadeChange = true;
+      // Convert Fixable instructions to their W versions.
+      for (MachineInstr *Fixable : FixableDef) {
+        LLVM_DEBUG(dbgs() << "Replacing " << *Fixable);
+        Fixable->setDesc(TII.get(getWOp(Fixable->getOpcode())));
+        Fixable->clearFlag(MachineInstr::MIFlag::NoSWrap);
+        Fixable->clearFlag(MachineInstr::MIFlag::NoUWrap);
+        Fixable->clearFlag(MachineInstr::MIFlag::IsExact);
+        LLVM_DEBUG(dbgs() << "     with " << *Fixable);
+        ++NumTransformedToWInstrs;
+      }
+
+      LLVM_DEBUG(dbgs() << "Removing redundant sign-extension\n");
+      MRI.replaceRegWith(DstReg, SrcReg);
+      MRI.clearKillFlags(SrcReg);
+      MI->eraseFromParent();
+      ++NumRemovedSExtW;
+      MadeChange = true;
+    }
   }
 
   return MadeChange;


        


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