[llvm] 4e6adb3 - [RISCV] Transform fixable instruction in place in RISCVSExtWRemoval. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-11-21T19:22:53-08:00
New Revision: 4e6adb394ebcdb2350fac6b47f7b789750e1f300

URL: https://github.com/llvm/llvm-project/commit/4e6adb394ebcdb2350fac6b47f7b789750e1f300
DIFF: https://github.com/llvm/llvm-project/commit/4e6adb394ebcdb2350fac6b47f7b789750e1f300.diff

LOG: [RISCV] Transform fixable instruction in place in RISCVSExtWRemoval. NFC

Instead of creating a new instruction and copying operands, we can
use setDesc to convert in place.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D137970

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp b/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
index c040e01ad5cf..530918585bf9 100644
--- a/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
@@ -492,6 +492,7 @@ bool RISCVSExtWRemoval::runOnMachineFunction(MachineFunction &MF) {
 
   MachineRegisterInfo &MRI = MF.getRegInfo();
   const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>();
+  const RISCVInstrInfo &TII = *ST.getInstrInfo();
 
   if (!ST.is64Bit())
     return false;
@@ -531,22 +532,14 @@ bool RISCVSExtWRemoval::runOnMachineFunction(MachineFunction &MF) {
     Register DstReg = MI->getOperand(0).getReg();
     if (!MRI.constrainRegClass(SrcReg, MRI.getRegClass(DstReg)))
       continue;
-    // Replace Fixable instructions with their W versions.
+    // Convert Fixable instructions to their W versions.
     for (MachineInstr *Fixable : FixableDef) {
-      MachineBasicBlock &MBB = *Fixable->getParent();
-      const DebugLoc &DL = Fixable->getDebugLoc();
-      unsigned Code = getWOp(Fixable->getOpcode());
-      MachineInstrBuilder Replacement =
-          BuildMI(MBB, Fixable, DL, ST.getInstrInfo()->get(Code));
-      for (auto Op : Fixable->operands())
-        Replacement.add(Op);
-      for (auto *Op : Fixable->memoperands())
-        Replacement.addMemOperand(Op);
-
       LLVM_DEBUG(dbgs() << "Replacing " << *Fixable);
-      LLVM_DEBUG(dbgs() << "     with " << *Replacement);
-
-      Fixable->eraseFromParent();
+      Fixable->setDesc(TII.get(getWOp(Fixable->getOpcode())));
+      Fixable->clearFlag(MachineInstr::MIFlag::NoSWrap);
+      Fixable->clearFlag(MachineInstr::MIFlag::NoUWrap);
+      Fixable->clearFlag(MachineInstr::MIFlag::IsExact);
+      LLVM_DEBUG(dbgs() << "     with " << *Fixable);
       ++NumTransformedToWInstrs;
     }