[PATCH] D137419: [AArch64][SVE2] Add the SVE2.1 FP quadword reduction instructions

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:9259
+// SVE floating-point recursive reduction (quadwords)
+class sve2p1_fp_reduction_q<bits<2> sz, bits<3> opc, string mnemonic,
+                            RegisterOperand zpr_ty, string vec_sfx>
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As per my comment on D137411, can you use a similar class hierarchy as use by the normal reduction intrinsics?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137419/new/

https://reviews.llvm.org/D137419