[PATCH] D137420: [AArch64][SVE2] Add the SVE2.1 integer quadword min/max reduction instructions

[David Sherwood via Phabricator via llvm-commits]

david-arm created this revision.
david-arm added reviewers: sdesmalen, aemerson, paulwalker-arm, CarolineConcatto, kmclaughlin.
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This patch adds the assembly/disassembly for the following instructions:

smaxqv : Signed maximum reduction of quadword vector segments
sminqv : Signed minimum reduction of quadword vector segments
umaxqv : Unsigned maximum reduction of quadword vector segments
uminqv : Unsigned minimum reduction of quadword vector segments

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D137420

Files:
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/MC/AArch64/SVE2p1/smaxqv-diagnostics.s
  llvm/test/MC/AArch64/SVE2p1/smaxqv.s
  llvm/test/MC/AArch64/SVE2p1/sminqv-diagnostics.s
  llvm/test/MC/AArch64/SVE2p1/sminqv.s
  llvm/test/MC/AArch64/SVE2p1/umaxqv-diagnostics.s
  llvm/test/MC/AArch64/SVE2p1/umaxqv.s
  llvm/test/MC/AArch64/SVE2p1/uminqv-diagnostics.s
  llvm/test/MC/AArch64/SVE2p1/uminqv.s

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