[PATCH] D136263: [RISCV] Generate .cfi_def_cfa_expression for RVV stack adjustment

[Sergei Kachkov via Phabricator via llvm-commits]

kachkov98 updated this revision to Diff 472888.
kachkov98 added a comment.

Review changes + rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136263/new/

https://reviews.llvm.org/D136263

Files:
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
  llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll
  llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
  llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
  llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
  llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vector-fptrunc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vector-trunc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
  llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
  llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir
  llvm/test/CodeGen/RISCV/rvv/localvar.ll
  llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
  llvm/test/CodeGen/RISCV/rvv/round-vp.ll
  llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
  llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
  llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
  llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vpstore.ll
  llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
  llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
  llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir

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