[PATCH] D136263: [RISCV] Generate .cfi_def_cfa_expression for RVV stack adjustment

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added a comment.

Few minor comments.



================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:396
+static MCCFIInstruction createDefCFAExpression(const TargetRegisterInfo &TRI,
+                                               unsigned Reg,
+                                               unsigned FixedOffset,
----------------
`Register Reg` rather than `unsigned Reg`


================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:398
+                                               unsigned FixedOffset,
+                                               unsigned ScalableOffset) {
+  assert(ScalableOffset != 0 && "Did not need to adjust CFA for RVV");
----------------
`uint64_t` rather than `unsigned` here, since `RVVStackSize` and `getStackSizeWithRVVPadding` are both `uint64_t`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136263/new/

https://reviews.llvm.org/D136263